Synergistic effect of electromigration and Joule heating on system level weak-link failure in 2.5D integrated circuits

Abstract

In system level electromigration test of 2.5D integrated circuits, a failure mode due to synergistic effect of Joule heating and electromigration has been found. In the test circuit, there are three levels of solder joints, two Si chips (one of them has through-Si-via), and one polymer substrate. In addition, there are two redistribution layers; one between every two levels of solder joints. We found that the redistribution layer between the flip chip solder joints and micro-bumps is the weak-link and failed easily by burn-out in electromigration test. The failure is time-dependent with sudden resistance increase. Preliminary simulation results show that Joule heating has a positive feedback to electromigration in the redistribution layer and caused the thermal run-away failure. Joule heating becomes an important reliability issue in the future scaling of semiconductor devices.

Stress Relaxation and Grain Growth Behaviors of (111)-Preferred Nanotwinned Copper during Annealing

“…In order to enhance the computing performance of electronic devices, logic chips and interconnects are required to scale down significantly [ 7 , 8 , 9 ]. During operation, Cu lines are subjected to a high current density resulting in severe failures related to electromigration (EM), stress migration, and Joule heating [ 10 , 11 , 12 ]. Thus, studies on these reliability issues are needed.…”

A New Low-Temperature Solder Assembly Technique to Replace Eutectic Sn-Bi Solder Assembly

“…The vertical or horizontal stacking of chips in advanced packaging technology requires a low-meltingpoint solder. Specifically, vertical stacking such as 3D integrated circuit (3D IC) is achieved via multiple reflows, and the use of a low-melting-point solder can prevent the re-melting of solder joints connected in a previous reflow [4]. In addition, packaging sizes generated by horizontal stacking are becoming increasingly large, leading to severe warpage problems [5].…”

A high-entropy alloy as very low melting point solder for advanced electronic packaging

“…While Moore's law in Si chip technology is near ending, electronic packaging technology is becoming critically important in order to sustain the future computational growth in microelectronics industry. The trend in miniaturization of very-large-scaleintegration (VLSI) is moving from 2D IC to 3D IC [1][2][3]. The latter has various chips stacking vertically, which requires the development of new technologies such as TSV (through-Si-Via) and micro-bumps.…”