Synthesizing Complementary Circuits Automatically

Shen, Shengyu; Qin, Ying; Wang, Ke-fei; Xiao, Liquan; Zhang, Jianmin; Li, Sikun

doi:10.1109/tcad.2010.2049152

Cited by 8 publications

(5 citation statements)

References 27 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Circuits XGXS, Scrambler, PCIE, and T2Ethernet are from [11]; the CC series circuits are convolutional code encoders from [7,8]; circuit AD is the encoder of Figure 1; the Huff series circuits are Huffman code encoders; the LFSR series circuits correspond to linear feedback shift registers; the SBC circuit is a sliding block code encoder; others are from the MCNC and ISCAS benchmark suites. In the following experiments, the obtained decoder circuits were optimized in ABC under the script "strash; scleanup; dsd; strash; dc2; dc2; dch; map", where technology mapping was performed using the mcnc.genlib library.…”

Section: Resultsmentioning

confidence: 99%

“…That is, the decoder must causally recover a prefix of the original input sequence on-the-fly based on a so-far observed encoded sequence. Unlike prior work [11,12,7,8], the encoder under our consideration can have normal operation under non-dangling states, and the synthesized decoder can recover the original input sequence starting from the very first input (though with some time delay).…”

Section: Problem Statementmentioning

confidence: 99%

“…It is immediate that R ⇒ R † and thus R † over-approximates R. An UMC algorithm can be exploited as a black-box tool in decoder existence checking as follows. Instead of checking directly whether Formula (7) is satisfiable, we check if any (11) can be reached from the initial states I. (Notice that in Formula (11) the original free variables ⃗ s 0 are renamed to ⃗ s to avoid confusion as the time index 0 of ⃗ s 0 is merely a relative reference time point rather than the absolute initial time point.)…”

Section: Decoder Existence Checking Without a Priori Reachability Knomentioning

confidence: 99%

“…Shen et al [11] proposed a bounded decoder synthesis method with no termination guarantee. Complete synthesis methods were later established independently by Shen et al [12] and Liu et al [7,8].…”

Section: Introductionmentioning

confidence: 99%

See 3 more Smart Citations

Synthesis of feedback decoders for initialized encoders

Tu¹,

Jiang²

2013

Proceedings of the 50th Annual Design Automation Conference

View full text Add to dashboard Cite

Encoding and decoding are common practice in data processing. Designing encoder and decoder circuitry manually can be error prone and time consuming. Although great progress has been made on automating decoder synthesis from its encoder specification, prior specification was limited to an uninitialized encoder only, whose decoder in turn cannot depend on the entire execution history of the encoder. Prior decoder existence condition is unnecessarily stringent as encoders are often initialized to some specific starting states. This paper shows how decoders of initialized encoders can be practically synthesized. Experimental results demonstrate effective decoder synthesis of initialized encoders, beyond existing methods' capabilities.

show abstract

Section: Resultsmentioning

confidence: 99%

Section: Problem Statementmentioning

confidence: 99%

Section: Decoder Existence Checking Without a Priori Reachability Knomentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Synthesis of feedback decoders for initialized encoders

Tu¹,

Jiang²

2013

Proceedings of the 50th Annual Design Automation Conference

View full text Add to dashboard Cite

show abstract

“…One of the most difficult jobs in designing communication and multimedia chips is to design and verify complex encoder and decoder pairs. The encoder maps its input variables i to its output variables o, while the decoder recovers i from o. Complementary synthesis [Shen et al 2009[Shen et al , 2010[Shen et al , 2011[Shen et al , 2012Liu et al 2011Liu et al , 2012Tu and Jiang 2013] eases this job by automatically generating a decoder from an encoder, with the assumption that i can always be uniquely determined by a bounded sequence of o.…”

Section: Introductionmentioning

confidence: 99%

Complementary Synthesis for Encoder with Flow Control Mechanism

Qin

Shen

et al. 2015

ACM Trans. Des. Autom. Electron. Syst.

Self Cite

View full text Add to dashboard Cite

Complementary synthesis automatically generates an encoder's decoder with the assumption that the encoder's all input variables can always be uniquely determined by its output symbol sequence. However, to prevent the faster encoder from overwhelming the slower decoder, many encoders employ flow control mechanism that fails this assumption. Such encoders, when their output symbol sequences are too fast to be processed by the decoders, will stop transmitting data symbols, but instead transmitting idle symbols that can only uniquely determine a subset of the encoder's input variables. And the decoder should recognize and discard these idle symbols. This mechanism fails the assumption of all complementary synthesis algorithms, because some input variables can't be uniquely determined by the idle symbol. A novel algorithm is proposed to handle such encoders. First, it identifies all input variables that can be uniquely determined, and takes them as flow control variables. Second, it infers a predicate over these flow control variables that enables all other input variables to be uniquely determined. Third, it characterizes the decoder's Boolean function with Craig interpolant. Experimental results on several complex encoders indicate that this algorithm can always correctly identify the flow control variables, infer the predicates and generate the decoder's Boolean functions.

show abstract

Application and analysis of unsatisfiable cores on circuits synthesis

Zhang

2015

2015 Seventh International Conference on Advanced Computational Intelligence (ICACI)

View full text Add to dashboard Cite

Synthesizing Complementary Circuits Automatically

Cited by 8 publications

References 27 publications

Synthesis of feedback decoders for initialized encoders

Synthesis of feedback decoders for initialized encoders

Complementary Synthesis for Encoder with Flow Control Mechanism

Application and analysis of unsatisfiable cores on circuits synthesis

Contact Info

Product

Resources

About