Synthetic aperture radar with backprojection: A scalable, platform independent architecture for exhaustive FPGA resource utilization

Cholewa, Fabian; Pfitzner, M.; Fahnemann, Christian; Pirsch, P.; Blume, Holger

doi:10.1109/radar.2014.7060455

Cited by 11 publications

(5 citation statements)

References 10 publications

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“…4 show that 59 % of the time is spent executing the kernels while 33 % of the time is used for memory operations. To improve this, a doublebuffering scheme similar to the one employed in the FPGA implementation could be used [22].…”

Section: Resultsmentioning

confidence: 99%

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Synthetic Aperture Radar Algorithms on Transport Triggered Architecture Processors using OpenCL

Rother,

Mätzner,

Jääskeläinen

et al. 2023

2023 IEEE International Radar Conference (RADAR)

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Live SAR imaging from small UAVs is an emerging field. On-board processing of the radar data requires highperformance and energy-efficient platforms. One candidate for this are Transport Triggered Architecture (TTA) processors. We implement Backprojection and Backprojection Autofocus on a TTA processor specially adapted for this task using OpenCL. The resulting implementation is compared to other platforms in terms of energy efficiency. We find that the TTA is on-par with embedded GPUs and surpasses other OpenCL-based platforms. It is outperformed only by a dedicated FPGA implementation.

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Section: Resultsmentioning

confidence: 99%

“…3) FPGA Implementation: As a final comparison we used a dedicated FPGA implementation for Backprojection processing [22]. It runs on a Xilinx ZCU102 evaluation board, featuring a Zynq UltraScale+ XCZU9EG-2FFVB1156 MPSoC fabricated in TSMC's 16FinFET+ process.…”

Section: B Reference Platformsmentioning

confidence: 99%

Synthetic Aperture Radar Algorithms on Transport Triggered Architecture Processors using OpenCL

Rother,

Mätzner,

Jääskeläinen

et al. 2023

2023 IEEE International Radar Conference (RADAR)

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show abstract

“…Cholewa et al present the implementation of the backprojection algorithm using the Unified Emulation Framework (UEMU) [45]. This framework allows the development of hardware for different devices, such as software-defined radio (SDR) platforms, FPGA and application-specific integrated circuits (ASIC).…”

Section: Hardware Acceleratorsmentioning

confidence: 99%

“…Similar result was reported by [47] using the polar format algorithm. On the other hand, backprojection generates images with higher quality but for the same image size [45] required more than 35× of the execution time.…”

Section: Hardware Acceleratorsmentioning

confidence: 99%

A Review of Synthetic-Aperture Radar Image Formation Algorithms and Implementations: A Computational Perspective

et al. 2022

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Designing synthetic-aperture radar image formation systems can be challenging due to the numerous options of algorithms and devices that can be used. There are many SAR image formation algorithms, such as backprojection, matched-filter, polar format, Range–Doppler and chirp scaling algorithms. Each algorithm presents its own advantages and disadvantages considering efficiency and image quality; thus, we aim to introduce some of the most common SAR image formation algorithms and compare them based on these two aspects. Depending on the requisites of each individual system and implementation, there are many device options to choose from, for instance, FPGAs, GPUs, CPUs, many-core CPUs, and microcontrollers. We present a review of the state of the art of SAR imaging systems implementations. We also compare such implementations in terms of power consumption, execution time, and image quality for the different algorithms used.

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“…Cholewa et al [21] developed a BP module to generate one line of the final image at a time, looping over all pulses for each line. The results obtained show that the implementation scales almost linearly with the parallelization factor.…”

Section: Related Workmentioning

confidence: 99%

Onboard Processing of Synthetic Aperture Radar Backprojection Algorithm in FPGA

Mota

Cruz

Miranda

et al. 2022

IEEE J. Sel. Top. Appl. Earth Observations Remote Sensing

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Synthetic aperture radar is a microwave technique to extracting image information of the target. Electromagnetic waves that are reflected from the target are acquired by the aircraft or satellite receivers and sent to a ground station to be processed by applying computational demanding algorithms. Radar data streams are acquired by an aircraft or satellite and sent to a ground station to be processed in order to extract images from the data since these processing algorithms are computationally demanding. However, novel applications require real-time processing for real-time analysis and decisions and so onboard processing is necessary. Running computationally demanding algorithms on onboard embedded systems with limited energy and computational capacity is a challenge. This article proposes a configurable hardware core for the execution of the backprojection algorithm with high performance and energy efficiency. The original backprojection algorithm is restructured to expose computational parallelism and then optimized by replacing floating-point with fixed-point arithmetic. The backprojection core was integrated into a system-onchip architecture and implemented in a field-programmable gate array. The proposed solution runs the optimized backprojection algorithm over images of sizes 512 × 512 and 1024 × 1024 in 0.14 s (0.41 J) and 1.11 s (3.24 J), respectively. The architecture is 2.6× faster and consumes 13× less energy than an embedded Jetson TX2 GPU. The solution is scalable and, therefore, a tradeoff exists between performance and utilization of resources.Index Terms-Field-programmable gate arrays (FPGA), onboard processing, real-time, synthetic aperture radar (SAR).

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Synthetic aperture radar with backprojection: A scalable, platform independent architecture for exhaustive FPGA resource utilization

Cited by 11 publications

References 10 publications

Synthetic Aperture Radar Algorithms on Transport Triggered Architecture Processors using OpenCL

Synthetic Aperture Radar Algorithms on Transport Triggered Architecture Processors using OpenCL

A Review of Synthetic-Aperture Radar Image Formation Algorithms and Implementations: A Computational Perspective

Onboard Processing of Synthetic Aperture Radar Backprojection Algorithm in FPGA

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