2019
DOI: 10.1109/tc.2018.2887225
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SyRA: Early System Reliability Analysis for Cross-Layer Soft Errors Resilience in Memory Arrays of Microprocessor Systems

Abstract: Cross-layer reliability is becoming the preferred solution when reliability is a concern in the design of a microprocessor-based system. Nevertheless, deciding how to distribute the error management across the different layers of the system is a very complex task that requires the support of dedicated frameworks for cross-layer reliability analysis. This paper proposes SyRA, a system-level cross-layer early reliability analysis framework for radiation induced soft errors in memory arrays of microprocessor-base… Show more

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Cited by 33 publications
(10 citation statements)
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“…Although these two categories are complementary, few works consider their combination in order to accurately analyse the impact of the radiation from the environment on the hardware design and application workload under study. A recent cross-layer approach considers technology, circuit, hardware and application layers based on Bayesian models for single-bit faults in memory components [15]. However, multiple-bit faults and combinational logic faults cannot be neglected and should be included in the reliability analysis.…”
Section: Introductionmentioning
confidence: 99%
“…Although these two categories are complementary, few works consider their combination in order to accurately analyse the impact of the radiation from the environment on the hardware design and application workload under study. A recent cross-layer approach considers technology, circuit, hardware and application layers based on Bayesian models for single-bit faults in memory components [15]. However, multiple-bit faults and combinational logic faults cannot be neglected and should be included in the reliability analysis.…”
Section: Introductionmentioning
confidence: 99%
“…Using PTM, we showed that though the accuracy of an adder using MUX is controlled by select inputs, they must be taken in order with inputs to reduce error. Nevertheless to mention that majority of works are aligned towards reliability assessment and analysis [7,8].…”
Section: Introductionmentioning
confidence: 99%
“…Indeed, dependability can be reduced in many ways: without taking into consideration errors due to design, hardware or software bugs, issues occurred during fabrication, intentional tampering, or many other external events that can affect this property during the lifetime of the application. Due to the interaction of the circuit with the surrounding environment memory bit-flips, signal degradation, data loss, and permanent damage to the physical circuit may happen [2]. Usually, the system dependability can be achieved with a deep analysis of the system weaknesses, and then with the implementation of mitigation techniques that allow to reduce or completely remove them.…”
Section: Introductionmentioning
confidence: 99%