System in package (SiP) technology: fundamentals, design and applications

Abstract

Purpose The purpose of this paper is to demonstrate a novel 3D system-in-package (SiP) approach. This new packaging approach is based on stacked silicon submount technology. As demonstrators, a smart lighting module and a sensor systems were successfully developed by using the fabrication and assembly process described in this paper. Design/methodology/approach The stacked module consists of multiple layers of silicon submounts which can be designed and fabricated in parallel. The 3D stacking design offers higher silicon efficiency and miniaturized package form factor. This platform consists of silicon submount design and fabrication, module packaging, system assembling and testing and analyzing. Findings In this paper, a smart light emitting diode system and sensor system will be described based on stacked silicon submount and 3D SiP technology. The integrated smart lighting module meets the optical requirements of general lighting applications. The developed SiP design is also implemented into the miniaturization of particular matter sensors and gas sensor detection system. Originality/value SiP has great potential of integrating multiple components into a single compact package, which has potential implementation in intelligent applications.

From active phased array antenna to antenna array microsystem in post-Moore era

“…2.5D/3D 垂直互连技术基于多学科多专业, 融合了系统设计和微纳集成工艺, 以实现不同材料、 不 同结构、不同工艺、不同功能元器件的三维异构集成, 是以突破摩尔定律极限为目的 [33] , 重点解决天 线阵列微系统内部高速、高频、大功率传输下的超高密度互连难题. 共烧陶瓷型 (MCM-C) 互连基板技术 [36] .…”

A Review of System-in-Package Technologies: Application and Reliability of Advanced Packaging

“…SiP technology combines numerous active devices that are based on bare chips with various passive devices that are all combined into a single package. A system-level device capable of performing specific operations is ultimately created through the processing procedure [ 8 ]. It is clear from the definition that the SiP is situated at the packaging’s integration level.…”

“…The current increasing demand for high-performance packages has led to a preference for SiP technology [ 10 ], where a “combined” system may contain the functionality of many chips. The SiP is advancing in terms of density, power, and miniaturization along with the advancement of integration and packaging technologies [ 8 , 13 ]. SiPs include a variety of advanced packaging technologies such as the fan-out wafer-level package (FOWLP), chip-on-wafer-on-substrate (CoWoS), and others [ 14 , 16 ].…”

A thermomechanical constitutive model for investigating the fatigue behavior of Sn‐rich solder under thermal cycle loading

“…With the rapid development of microelectronics and nanoelectronics, Moore law has significantly slowed down. To meet the increasing demand of small size and low cost of electronic device, advanced electronic packaging technology, such as system in packaging (SiP) has become one of the promising technologies for More than Moore at least for next one to two decades 1,2 . Fatigue behaviors of the interconnect material such as solder in SiP are critical for yield in processes and reliability in testing and operation, which are strongly affected by the material microstructures 3,4 .…”

“…To meet the increasing demand of small size and low cost of electronic device, advanced electronic packaging technology, such as system in packaging (SiP) has become one of the promising technologies for More than Moore at least for next one to two decades. 1,2 Fatigue behaviors of the interconnect material such as solder in SiP are critical for yield in processes and reliability in testing and operation, which are strongly affected by the material microstructures. 3,4 As a result, investigation into the effects of solder microstructure on the fatigue behaviors is important for the development of SiP, which can lead to more accurate life prediction and optimized design for the material selection and component structure in SiP.…”