System-Level Evaluation of Video Processing System Using SimpleScalar-Based Multi-core Processor Simulator

We aim to improve the efficiency of our previously proposed anti-malware hardware; it is a hardware-implemented malware detection mechanism that uses information inside the processor. We previously evaluated a prototype, but, due to its prototypical nature, there remain limitations, such as only detecting certain behaviors, high power consumption, and a tendency to bloat the training model. In this paper, we propose a circuit and a learning method to achieve high efficiency, low power consumption, and light weight for the model. In considering these three issues, we focus on time-series metadata obtained by transforming the processor information. To improve efficiency, we implement predictive detection to predict the behavior of metadata in the malware detection component. This lets the model detect malware within less than 19% of the number of execution cycles of the conventional method. To reduce power consumption, we implement a sampling circuit that interrupts the input to the detection circuit at regular intervals, reducing the system’s uptime by 99% while maintaining judgment accuracy. Finally, for a light weight, we focus on the training process of the metadata generator based on a machine-learning model. By applying sampling learning and feature dimensionality reduction in the training process, a metadata generator approximately 16% smaller than the previous version is created.

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“…Taking advantage of its open source nature, some researchers have made their own improvements to SimpleScalar and used it for evaluation [30].…”

Section: Anti-malware Hardware Emulatormentioning

confidence: 99%

IoT-oriented high-efficient anti-malware hardware focusing on time series metadata extractable from inside a processor core

Koike

Kobayashi

Katoh

2022

Int. J. Inf. Secur.

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“…Another one is the simulator-based method [26,27] using the processor simulator that models the real processor's architecture. It collects processor performance data by using the simulator to execute the application.…”

Section: Related Workmentioning

confidence: 99%

Probability Analysis to Improve the Confidence in Profiling Accuracy

Wen

Cheng

Lin

et al. 2021

Mathematical Problems in Engineering

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Performance profiling for the system is necessary and has already been widely supported by hardware performance counters (HPC). HPC is based on the registers to count the number of events in a time interval and uses system interruption to read the number from registers to a recording file. The profiled result approximates the actual running states and is not accurate since the profiling technique uses sampling to capture the states. We do not know the actual running states before, which makes the validation on profiling results complex. Jianwei YinSome experiments-based analysis compared the running results of benchmarks running on different systems to improve the confidence of the profiling technique. But they have not explained why the sampling technique can represent the actual running states. We use the probability theory to prove that the expectation value of events profiled is an unbiased estimation of the actual states, and its variance is small enough. For knowing the actual running states, we design a simulation to generate the running states and get the profiled results. We refer to the applications running on production data centers to choose the parameters for our simulation settings. Comparing the actual running states and the profiled results shows they are similar, which proves our probability analysis is correct and improves our confidence in profiling accuracy.

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Design of CAD ASIP for JIT extensible processor: Case study on PathFinder routing algorithm

Daryanavard

Eshghi

Jahanian

2015

2015 23rd Iranian Conference on Electrical Engineering

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System-Level Evaluation of Video Processing System Using SimpleScalar-Based Multi-core Processor Simulator

Cited by 3 publications

References 4 publications

IoT-oriented high-efficient anti-malware hardware focusing on time series metadata extractable from inside a processor core

IoT-oriented high-efficient anti-malware hardware focusing on time series metadata extractable from inside a processor core

Probability Analysis to Improve the Confidence in Profiling Accuracy

Design of CAD ASIP for JIT extensible processor: Case study on PathFinder routing algorithm

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