5th IEEE International Workshop on Advances in Sensors and Interfaces IWASI 2013
DOI: 10.1109/iwasi.2013.6576097
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System-level modeling and reliability analysis of microprocessor systems

Abstract: I am particularly thankful to my parents, Lo-Wen Chen and Shu-Yuan Tang, who have always been on my side, for their love and encouragement throughout my life. I also thank my grandfather, grandmothers, brother, Hsuan-Chih Chen, and sister, Jou-Chou Chen, for their love and support. Last but not least, I would like to thank all the professors, teachers, families, and friends who guided me to become the person that I am today.v

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Cited by 14 publications
(11 citation statements)
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“…Running RTL or SPICE simulations of a complete microprocessor to extract the activity profile of each net is not feasible in most cases, since it may take a few months to finish simulating a single benchmark. On the other hand, simulating microprocessors with standard benchmarks on an FPGA (the Xilinx Virtex-5) takes only a few minutes [21,22]. Our framework for extracting the activity/thermal profiles is schematically described in Fig.…”
Section: Extraction Of Activity/thermal Profilesmentioning
confidence: 99%
“…Running RTL or SPICE simulations of a complete microprocessor to extract the activity profile of each net is not feasible in most cases, since it may take a few months to finish simulating a single benchmark. On the other hand, simulating microprocessors with standard benchmarks on an FPGA (the Xilinx Virtex-5) takes only a few minutes [21,22]. Our framework for extracting the activity/thermal profiles is schematically described in Fig.…”
Section: Extraction Of Activity/thermal Profilesmentioning
confidence: 99%
“…Gate oxide breakdown (GOBD) is modeled as a leakage current which flows through the gate oxide in an SRAM cell [3]. Although the leakage path appears between the gate and substrate, the gate-to-substrate leakage is usually neglected since it has a little effect on performance [1].…”
Section: Modeling Gobd and Btddb In An Sram Cellmentioning
confidence: 99%
“…However, there is no study that separates GOBD and BTDDB, both of which create leakage paths in the SRAM cell. GOBD is modeled as a leakage path through the gate oxide of transistors [3] and BTDDB is modeled as a resistive bridge between unconnected metals in the same layer [2]. Some of the resistive short locations in an SRAM cell overlap, and hence these faults result in exactly the same failure signature.…”
Section: Introductionmentioning
confidence: 99%
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