System-on-Chip Power Management Considering Leakage Power Variations

Chandra, Saumya; Lahiri, Kanishka; Raghunathan, Anand; Dey, Sujit

doi:10.1109/dac.2007.375287

Cited by 2 publications

(2 citation statements)

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“…In a recent work [15], the authors propose a method to optimize the power management policy of a System-On-Chip (SOC) statistically across all chips taking process variations into account and its effect on leakage power. Further, they suggest approaches to adapt the policy on a chip by chip basis.…”

Section: Introductionmentioning

confidence: 99%

AppAdapt: Opportunistic Application Adaptation in Presence of Hardware Variation

Pant

Gupta

Schaar

2012

IEEE Trans. VLSI Syst.

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Abstract-In this work, we propose a method to reduce the impact of process variations by adapting the application's algorithm at the software layer. We introduce the concept of hardware signatures as the measured post manufacturing hardware characteristics that can be used to drive software adaptation across different die. Using H.264 encoding as an example, we demonstrate significant yield improvements (as much as 30% points at 0% hardware overdesign), a reduction in overdesign (by as much as 8% points at 80% yield) as well as application quality improvements (about 2.0dB increase in average peak-signal-to-noise ratio at 70% yield). Further, we investigate implications of limited information exchange (i.e. signature quantization) on yield and quality. We conclude that hardware-signature based application adaptation is an easy and inexpensive (to implement), better informed (by actual application requirements) and effective way to manage yield-costquality tradeoffs in application-implementation design flows.

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Section: Introductionmentioning

confidence: 99%

AppAdapt: Opportunistic Application Adaptation in Presence of Hardware Variation

Pant

Gupta

Schaar

2012

IEEE Trans. VLSI Syst.

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show abstract

“…In a recent work [12], the authors propose a method to optimize the power management policy of an SOC statistically across all chips taking process variations into account and its effect on leakage power. Further, they suggest approaches to tweak the policy on a chip by chip basis.…”

Section: Introductionmentioning

confidence: 99%

Software adaptation in quality sensitive applications to deal with hardware variability

Pant

Gupta

Schaar

2010

Proceedings of the 20th Symposium on Great Lakes Symposium on VLSI

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In this work, we propose a method to reduce the impact of process variations by adapting the application's algorithm at the software layer. We introduce the concept of hardware signatures as the measured post manufacturing hardware characteristics that can be used to drive software adaptation across different die. Using H.264 encoding as an example, we demonstrate significant yield improvements (as much as 40% points at 0% over-design), a reduction in overdesign (by as much as 10% points at 80% yield) as well as application quality improvements (about 2.6dB increase in average PSNR at 80% yield). Further, we investigate implications of limited information exchange (i.e. signature measurement granularity) on yield and quality. We show that our proposed technique for determining optimal signature measurement points results in an improvement in PSNR of about 1.3dB over naive sampling for the H.264 encoder. We conclude that hardware-signature based application adaptation is an easy and inexpensive (to implement), better informed (by actual application requirements) and effective way to manage yield-cost-quality tradeoffs in applicationimplementation design flows.

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System-on-Chip Power Management Considering Leakage Power Variations

Cited by 2 publications

References 0 publications

AppAdapt: Opportunistic Application Adaptation in Presence of Hardware Variation

AppAdapt: Opportunistic Application Adaptation in Presence of Hardware Variation

Software adaptation in quality sensitive applications to deal with hardware variability

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