Systematic study of Schottky barrier MOSFETs with dopant segregation on thin-body SOI

Urban, Christoph; Sandow, C.; Zhao, Qing‐Tai; Knoch, J.; Lenk, St.; Mantl, S.

doi:10.1016/j.sse.2009.12.017

Cited by 15 publications

(7 citation statements)

References 22 publications

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“…The S/D resistance of the n-type devices on the 20-nm thick SOI substrate is R se/de = 718 Xlm, whereas a value of R se/de = 2.56 kXlm is evident for the p-type devices. For the n-type SB-MOSFETs R se/de is comparable to the value of 600 Xlm which is extracted from the DC characteristics of long-channel SB-MOSFETs with dopant segregation fabricated on 30-nm thick SOI [24] if the thickness ratio is taken into account. The higher R se/de of the p-type SB-MOSFETs agrees well with the DC characteristics, shown in Fig.…”

Section: Rf Characterizationmentioning

confidence: 78%

Small-signal analysis of high-performance p- and n-type SOI SB-MOSFETs with dopant segregation

Urban

Emam

Sandow

et al. 2010

Solid-State Electronics

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Section: Rf Characterizationmentioning

confidence: 78%

Small-signal analysis of high-performance p- and n-type SOI SB-MOSFETs with dopant segregation

Urban

Emam

Sandow

et al. 2010

Solid-State Electronics

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“…With other words, the ultrathin barrier becomes transparent via carrier tunneling. By applying this method we have fabricated Schottky-Barrier MOSFETs with output currents exceeding 1mA/µm and remarkable RF performance [3]. Here, we make use of this method for TFETs.…”

Section: Resultsmentioning

confidence: 99%

“…A great advantage of DS is that very steep dopant profiles can be achieved at low T process [3,4]. In a p-type TFET minority carriers, holes, tunnel into the channel and electrons from the channel into the reservoir.…”

Section: Resultsmentioning

confidence: 99%

Si tunneling transistors with high on-currents and slopes of 50 mV/dec using segregation doped Nisi<inf>2</inf> tunnel junctions

Knöll

Zhao

Trellenkamp

et al. 2012

2012 Proceedings of the European Solid-State Device Research Conference (ESSDERC)

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Planar and nanowire (NW) tunneling field effect transistors (TFETs) have been fabricated on ultra thin strained and unstrained SOI with shallow doped Nickel disilicide (NiSi 2 ) source and drain (S/D) contacts. We developed a novel, self-aligned process to form the p-i-n TFETs which greatly easies their fabrication by tilted dopant implantation using the high-k/metal gate as a shadow mask and dopant segregation. Two methods of dopant segregation are compared: Dopant segregation based on the "snowplough" effect of dopants during silicidation and implantation into the silicide (IIS) followed by thermal outdiffusion. High drive currents of up to 60 µA/µm of planar p-TFETs were achieved indicating good silicide/silicon tunneling junctions. The non linear temperature dependence of the inverse subthreshold slope S indicates typical TFET behavior. Strained Si NW array n-TFETs with omega shaped HfO 2 /TiN gates showed high drive currents of 7 µA/µm @ 1V V dd and steep inverse subthreshold slopes with minimum values of 50mV/dec due to the smaller band gap of strained Si and optimized electrostatics.

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“…[1][2][3] Recently, metal silicides have been considered as the source and drain (S/D) material in Schottky barrier metal-insulator-semiconductor fieldeffect transistors (MISFETs). 4,5 However, one difficulty in achieving high performance with these MISFETs is high contact resistance due to the Schottky barrier height (SBH) between the S/D and the Si channel. One new attempt at modulating the effective SBH values is dopant segregation at the interface of the silicide S/D and the Si channel.…”

Section: Introductionmentioning

confidence: 99%

“…It has been reported that the epitaxially grown nickel silicide S/D induces dopant segregation to decrease the effective SBH. 4,5 Mise et al 4 showed that Ni disilicide S/D with segregation of n-type and p-type dopants in atomically flat metal/Si interfaces can work for both type MISFETs with a 6 nm gate length.…”

Section: Introductionmentioning

confidence: 99%

Electronic properties of W-encapsulated Si cluster film on Si (100) substrates

Park

Uchida

Tada

et al. 2012

Journal of Applied Physics

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We have fabricated thin films composed of W-encapsulated Si clusters (WSi 10 ) on Si substrates and investigated their electronic properties using scanning transmission electron microscopy (STEM) and electron energy loss spectroscopy (EELS). An epitaxial layer was observed at the interface with the Si substrate, and an amorphous layer was on top. The bulk plasmon of the WSi 10 cluster film was measured and compared with those of crystalline Si (c-Si) and WSi 2 films. We found similar plasmon energies in the epitaxial and amorphous layers of the WSi 10 cluster film. The plasmon peak of the WSi 10 cluster film is shifted to higher energy compared with that of c-Si, which is related to the electron density increase in the valence band. The Si-L 23 absorption edge spectra show that the conduction-band density of states in Si was modified by hybridization between Si and W atoms.

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Systematic study of Schottky barrier MOSFETs with dopant segregation on thin-body SOI

Cited by 15 publications

References 22 publications

Small-signal analysis of high-performance p- and n-type SOI SB-MOSFETs with dopant segregation

Small-signal analysis of high-performance p- and n-type SOI SB-MOSFETs with dopant segregation

Si tunneling transistors with high on-currents and slopes of 50 mV/dec using segregation doped Nisi<inf>2</inf> tunnel junctions

Electronic properties of W-encapsulated Si cluster film on Si (100) substrates

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