Systematic testing and formal verification to validate reactive programs

Müllerburg, Monika; Holenderski, Leszek; Maffeis, Olivier; Merceron, Agathe; Morley, Matthew

doi:10.1007/bf00402649

Cited by 17 publications

(6 citation statements)

References 11 publications

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“…Carver and Tai [1] report results on the generation of tests for four applications: the bounded buffer, the readers and writers problem, the gas station problem, and the sliding window protocol. Müllerburg et al [5] report on their experiments with the verification and validation of an elevator specification. We studied these five applications with our test generator and found that the use of our coverage criteria and test constraints simplifies the construction of test suites, without sacrificing the quality of the test cases produced.…”

Section: Theoretical Applicationsmentioning

confidence: 98%

See 1 more Smart Citation

Projected state machine coverage for software testing

Friedman¹,

Hartman²,

Nagin³

et al. 2002

Proceedings of the 2002 ACM SIGSOFT International Symposium on Software Testing and Analysis

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Our research deals with test generation for software based on finite state machine (FSM) models of the program specification. We describe a set of coverage criteria and testing constraints for use in the automatic generation of test suites. We also describe the algorithms used to generate test suites based on these coverage criteria, and the implementation of these algorithms as an extension of the Murφ model checker [4]. The coverage criteria are simple but powerful in that they generate test suites of high quality and moderate volume, without requiring the user to have a sophisticated grasp of the test generation technology. The testing constraints are used to combat the endemic problem of state explosion, typically encountered in FSM techniques. We illustrate our techniques on several well-known problems from the literature and describe two industrial trials, to demonstrate the validity of our claims.

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Section: Theoretical Applicationsmentioning

confidence: 98%

“…Müllerburg et al [5] report on the combination of systematic testing and formal verification of an elevator control program. Her group uses two separate specifications: one a behavioral model to generate test cases, and the other a logical, declarative model for formal verification.…”

Section: Elevator Control Modelmentioning

confidence: 99%

Projected state machine coverage for software testing

Friedman¹,

Hartman²,

Nagin³

et al. 2002

Proceedings of the 2002 ACM SIGSOFT International Symposium on Software Testing and Analysis

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show abstract

“…Außerdem können Programme so groß werden, daß der Modell-Prüfer sie nicht mehr bearbeiten kann. Als pragmatischer Weg zur Validierung software-intensiver eingebetteter Systeme, die als synchrone objektorientierte Programme realisiert sind, bietet sich an, Test und formale Verifikation (automatische und manuelle) als komplementäre Techniken zu betrachten [17] und dabei insbesondere das Konzept der synchronen Observer zu nutzen.…”

Section: Schlußbemerkungunclassified

Validierung Software-intensiver eingebetteter Systeme

Müllerburg¹

2000

Informatik Forsch Entw

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“…Because of their safety critical behaviors, we cannot use conventional methods to validate them. Popular programming languages are not much reliable, so validation of developed programs by these languages cannot be done completely [1].…”

Section: Introductionmentioning

confidence: 99%

RVERL: Run-time Verification of Real-time and Reactive Programs using Event-based Real-Time Logic Approach

Jalili

MirzaAghaei

2007

5th ACIS International Conference on Software Engineering Research, Management &Amp; Applications (SERA 2007)

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Conventional software Verification and Validation (V&V) approaches for real-time and reactive programs are not practical because applying formal methods is too complex and testing methods are incomplete. It seems runtime verification of programs is a novel approach as a compliment to testing methods. We use Event-based Real-time Logic (ERL) as a specification language in order to simply specify safety properties. By applying aspect-oriented approach to instrumentation, we integrate runtime verification module (i.e. Monitor) with program itself and minimize overhead of runtime verification too. Our proposed method, RVERL, consists of three phases. First, safety properties are extracted from program requirements specification. Second, properties are mapped to timing, functional and deadline aspects which constitute the Monitor. Then it is weaved to the program source code. Third, at the execution time, the Monitor as a wrapper observes program behavior and protects the program against its misbehavior (i.e., property violations). Experiments on Rail Road Crossing problem show that the RVERL reveals all property violations while overhead of runtime verification is just about 4 percent.

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Systematic testing and formal verification to validate reactive programs

Cited by 17 publications

References 11 publications

Projected state machine coverage for software testing

Projected state machine coverage for software testing

Validierung Software-intensiver eingebetteter Systeme

RVERL: Run-time Verification of Real-time and Reactive Programs using Event-based Real-Time Logic Approach

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