Techniques for accurate performance evaluation in architecture exploration

Abstract

Abstract-We present a system that automatically generates a cycle-accurate and bit-true instruction level simulator (ILS) and a hardware implementation model given a description of a target processor. An ILS can be used to obtain a cycle count for a given program running on the target architecture, while the cycle length, die size, and power consumption can be obtained from the hardware implementation model. These figures allow us to accurately and rapidly evaluate target architectures within an architecture exploration methodology for system-level synthesis.In an architecture exploration scheme, both the ILS and the hardware model must be generated automatically, else a substantial programming and hardware design effort has to be expended in each design iteration. Our system uses the Instruction Set Description language to support the automatic generation of the ILS and the hardware synthesis model, as well as other related tools.

Retargetable Processor System Integration into Multi-Processor System-on-Chip Platforms

“…Instruction-set Centric Languages like ISDL [91] and nML [92]. These languages are targeted for modeling the instruction set and instruction behavior rather than the hardware structure.…”

“…The Instruction Set Description Language (ISDL) [91] originates from the Massachusetts Institute of Technology (MIT). The group also developed a simulator generator (GENSIM) and a hardware generator (HGEN).…”

The ArchC Architecture Description Language and Tools

“…Another strong constraint: ISDL is not able to model multi-cycle instructions of variable length. (11) ArchC has its syntax totally based on C++ and SystemC. It was designed focused on SystemC users, i.e., aiming to make these users more comfortable with the language, since its syntax is very similar to the one they are familiar with.…”

Retargetable generation of TLM bus interfaces for MP-SoC platforms

“…In order to efficiently design customized processor cores, abstract Architecture Description Languages like EXPRESSION [10], ISDL [11], LISA [12], MIMOLA [13] and nML [14] have become popular. Basically, those environments which generate fast simulators with good system integration capabilities could have been used for this work.…”