The study is aimed at consideration of improving the energy efficiency of devices. The article discusses methods for ensuring resistance to heavy charged particles (HCP) of a microprocessor RAM unit . A description of the implementation and a block diagram of static memory based on dummy blocks is provided. The work discusses methods of combating the biopolar effect, which are aimed at controlling the potential of the transistor body and reducing resistance. The dependence of the critical charge of a SOI memory cell on the gain of a parasitic biopolar transistor is modeled. To increase the fault tolerance of combinational circuits consisting of control logic and decoder blocks, redundancy is used at the level of individual gates. The article is considered to be useful for IT engineers and energy engineers, as well.