Temperature-dependent power-law analysis of capacitance-voltage for GaN-based pn junction

Abstract

Capacitance-voltage (C-V) measurement is an effective method that has been widely used to study the electronic characteristics of the pn junction. In this paper, the C-V measurement is used to study the effect of the temperature on the structural type of the GaN-based pn junction. The C−2-V and C−3-V curves, combined with power-law index k, are used to determine the structural type of the GaN-based pn junction when the temperature is set at 25 °C, −50 °C, −100 °C, −150 °C, and −195 °C. Our experimental results show that the C−2-V curve is a clear linear relation, and the index k is 0.5 when the temperature is set at 25 °C and −50 °C. This shows an abrupt junction when the temperature ranges from 25 °C to −50 °C. When the temperature is dropped to −100 °C, the structural type of the pn junction begins to change and the index k becomes 0.45. When the temperature is decreased further to T = −150 °C and −195 °C, the index k becomes 0.30 and 0.28, respectively, corresponding to a non-abrupt and non-linear junction. Possible explanations of this phenomenon are: the low-temperature carrier freeze-out effect and the localized space charge region that is produced by crystal defects and interface states. The enhancement of the inhomogeneous and localized space charge region further affects the structural type of the pn junction in a low temperature environment.

High-Performance Photodetectors with an Ultrahigh Photoswitching Ratio and a Very Fast Response Speed in Self-Powered Cu2ZnSnS4/CdS PN Heterojunctions

“…At a given temperature, the attenuation behavior of the capacitance is clear as the absolute value of the applied reverse bias increases. Moreover, this attenuation is strengthened with the increasing temperature, i.e., the steeper slope of the C – V curve is demonstrated at a higher temperature, which is an indication of the appearance of some defect charges contributing to the larger capacitance at a higher temperature . In addition, the temperature dependence of the capacitance ( C – T ) is further extracted from Figure g under the zero bias at the temperatures from 80 to 300 K. An abnormal evolution of the C – T curve (Figure h) occurs at ≈160 K, which is obviously evidenced by the derivative of capacitance with the temperature at a zero bias (right inset of Figure h).…”

“…Moreover, this attenuation is strengthened with the increasing temperature, i.e., the steeper slope of the C−V curve is demonstrated at a higher temperature, which is an indication of the appearance of some defect charges contributing to the larger capacitance at a higher temperature. 51 In addition, the temperature dependence of the capacitance (C−T) is further extracted from Figure 4g under the zero bias at the temperatures from 80 to 300 K. An abnormal evolution of the C−T curve (Figure 4h) occurs at ≈160 K, which is obviously evidenced by the derivative of capacitance with the temperature at a zero bias (right inset of Figure 4h). This anomaly occurred at ≈160 K, as indicated by the arrow, is also found both in the C−T curves (Figure S5a,b, Supporting Information) and the derivative of capacitance with temperature (insets of Figure S5a,b, Supporting Information) at the bias voltages of −1 and 1 V. This anomaly occurring at the reverse, zero, and forward biases has been rejected to be caused by either the barrier capacitance or diffusion for a PN junction.…”

Characterization of defect states in Mg-doped GaN-on-Si p+n diodes using deep-level transient Fourier spectroscopy

“…In order to determine the structural type of the GaN p + n diode, a capacitance-voltage (C-V) measurement was performed at room temperature in the bias range between −5 and 5 V and we extracted the power-law index k [50]. pn junctions can be broadly categorized under three structural types, an abrupt junction, a linearly graded junction, and a non-abrupt and nonlinear junction.…”