Temperature dependent studies on centimeter-scale MoS₂ and vdW heterostructures

Abstract

Transition metal dichalcogenides (TMDs) is an emerging 2D semiconducting material group which has excellent physical properties in the ultimately scaled thickness dimension. Specifically, van der Waals (vdW) heterostructures hold the great promise in further advancing both the fundamental scientific knowledge and practical technological applications of 2D materials. Although 2D materials have been extensively studied for various sensing applications, temperature sensing still remains relatively unexplored. In this work, we experimentally study the temperature-dependent Raman spectroscopy and electrical conductivity of molybdenum disulfide (MoS2) and its heterostructures with platinum dichalcogenides (PtSe2 and PtTe2) to explore their potential to become the next-generation temperature sensor. It is found that the MoS2-PtX2 heterostructure greatly enhances the temperature sensitivity.

Calcium Alginate as an Active Device Component for Light-Triggered Degradation of 2D MoS2-Based Transient Electronics

“…This controllable manipulation of Ca-AR/2D MoS 2 heterostructures independent of their integration sequences enables the fabrication of 2D MoS 2 -based FETs where Ca-AR film and 2D MoS 2 layers function as top-gate and channels, respectively. Figure d presents a Raman spectrum of 2D MoS 2 layers integrated on Ca-AR film, confirming two distinguishable peaks corresponding to the in-plane (E 2g 1 ) and out-of-plane (A 1g ) vibrational modes of 2D MoS 2 layers Figure e displays a schematic illustration of a 2D MoS 2 -based FET with a Ca-AR film top-gate fabricated sequentially integrating Ca-AR film and 2D MoS 2 layers on top of an insulating sapphire substrate.…”

“…and out-of-plane (A 1g ) vibrational modes of 2D MoS 2 layers. 50 Figure 3e displays a schematic illustration of a 2D MoS 2 -based FET with a Ca-AR film top-gate fabricated sequentially integrating Ca-AR film and 2D MoS 2 layers on top of an insulating sapphire substrate. Figure 3f presents an image of an actual FET where the large-area (>cm 2 , red box) 2D MoS 2 layers-based channel is interfaced with the Ca-AR film (white box)-based gate (G), which introduces EDL-enabled electrolyte gating into it.…”