Temperature Investigation on 3C-SiC Homo-Epitaxy on Four-Inch Wafers

Anzalone, Ruggero; Zimbone, Massimo; Calabretta, Cristiano; Mauceri, Marco; Alberti, Alessandra; Reitano, R.; Via, F. La

doi:10.3390/ma12203293

Cited by 18 publications

(28 citation statements)

References 19 publications

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“…The FWHM of the freestanding 3C-SiC is approximately 160 arcseconds, lower than the FWHM of 210 arcseonds extracted for the 3C-SiC on Si sample. This is in good agreement with previous reports [3] and suggests promising material quality when compared to 3C-SiC on Si material.…”

Section: Crystal Quality Investigation Using Xrdsupporting

confidence: 93%

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Initial investigations into the MOS interface of freestanding 3C-SiC layers for device applications

Renz

Vavasour

et al. 2021

Semicond. Sci. Technol.

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This letter reports on initial investigation results on the material quality and device suitability of a homo-epitaxial 3C-SiC growth process. Atomic force microscopy surface investigations revealed root-mean square surface roughness levels of 163.21 nm, which was shown to be caused by pits (35 µm width and 450 nm depth) with a density of 1.09 × 10 5 cm −2 which had formed during material growth. On wider scan areas, the formation of these were seen to be caused by step bunching, revealing the need for further epitaxial process improvement. X-ray diffraction showed good average crystalline qualities with a full width of half-maximum of 160 arcseconds for the 3C-SiC (002) being lower than for the 3C-on-Si material (210 arcseconds). The analysis of C-V curves then revealed similar interface-trapped charge levels for freestanding 3C-SiC, 3C-SiC on Si and 4H-SiC, with forming gas post-deposition annealed freestanding 3C-SiC devices showing D IT levels of 3.3 × 10 11 cm −2 eV −1 at E C −E T = 0.2 eV. The homo-epitaxially grown 3C-SiC material's suitability for MOS applications could also be confirmed by leakage current measurements.

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Section: Crystal Quality Investigation Using Xrdsupporting

confidence: 93%

“…A final 10 µm ntype drift layer of doping (2 × 10 16 cm −3 ) was epitaxially grown. The exact process has been reported by Anzalone et al [3].…”

Section: Methodsmentioning

confidence: 71%

Initial investigations into the MOS interface of freestanding 3C-SiC layers for device applications

Renz

Vavasour

et al. 2021

Semicond. Sci. Technol.

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“…Point defects can be observed in 3C-SiC by PL measurements on different samples grown in different conditions. In particular, the PL spectra in the wavelength range of 1100–1600 nm of different samples grown at different temperatures with the same growth rate are reported in Reference [ 64 ]. It was possible to observe that carbon vacancy (V C ), carbon–silicon vacancy (V C V Si ), carbon vacancy–Si antisite (V C C Si ), and Al-related defects are present [ 65 ].…”

Section: Resultsmentioning

confidence: 99%

“…Due to ongoing research, a new form of seeding material became available. As described by Anzalone et al [ 64 ], the production of freestanding 3C-SiC wafers grown homoepitaxially by CVD at elevated temperatures is possible. The availability of such seeding materials, up to a thickness of approximately 200 µm, offers new possibilities for the continuing growth using CS-PVT.…”

Section: Resultsmentioning

confidence: 99%

New Approaches and Understandings in the Growth of Cubic Silicon Carbide

et al. 2021

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In this review paper, several new approaches about the 3C-SiC growth are been presented. In fact, despite the long research activity on 3C-SiC, no devices with good electrical characteristics have been obtained due to the high defect density and high level of stress. To overcome these problems, two different approaches have been used in the last years. From one side, several compliance substrates have been used to try to reduce both the defects and stress, while from another side, the first bulk growth has been performed to try to improve the quality of this material with respect to the heteroepitaxial one. From all these studies, a new understanding of the material defects has been obtained, as well as regarding all the interactions between defects and several growth parameters. This new knowledge will be the basis to solve the main issue of the 3C-SiC growth and reach the goal to obtain a material with low defects and low stress that would allow for realizing devices with extremely interesting characteristics.

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“…These issues arise from the different lattice parameters and the difference in the thermal expansion coefficient [6,7]. The latter creates a network of dislocations at the interface that evolves into stacking faults (SFs) and grain boundaries (GBs) in the bulk, and the former causes the build-up of internal stress that can be released by the formation of several classes of extended defects, including also SFs and GBs [8,9,10,11,12,13].…”

Section: Introductionmentioning

confidence: 99%

3C-SiC Growth on Inverted Silicon Pyramids Patterned Substrate

Zimbone

Zieliński²,

Bongiorno

et al. 2019

Materials

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This work reports on the properties of cubic silicon carbide (3C-SiC) grown epitaxially on a patterned silicon substrate composed of squared inverted silicon pyramids (ISP). This compliant substrate prevents stacking faults, usually found at the SiC/Si interface, from reaching the surface. We investigated the effect of the size of the inverted pyramid on the epilayer quality. We noted that anti-phase boundaries (APBs) develop between adjacent faces of the pyramid and that the SiC/Si interfaces have the same polarity on both pyramid faces. The structure of the heterointerface was investigated. Moreover, due to the emergence of APB at the vertex of the pyramid, voids buried on the epilayer form. We demonstrated that careful control of the growth parameters allows modification of the height of the void and the density of APBs, improving SiC epitaxy quality.

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Temperature Investigation on 3C-SiC Homo-Epitaxy on Four-Inch Wafers

Cited by 18 publications

References 19 publications

Initial investigations into the MOS interface of freestanding 3C-SiC layers for device applications

Initial investigations into the MOS interface of freestanding 3C-SiC layers for device applications

New Approaches and Understandings in the Growth of Cubic Silicon Carbide

3C-SiC Growth on Inverted Silicon Pyramids Patterned Substrate

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