Second IEEE International Workshop on Electronic Design, Test and Applications
DOI: 10.1109/delta.2004.10043
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Testability Issues in Superconductor Electronics

Abstract: An emerging technology for solutions in high-end applications in computing and telecommunication is Superconductor Electronics. A system-level study has been carried out to verify the feasibility of DfT in superconductor electronics. In this paper, we present how this can be realized to monitor so-called single-flux quantum pulses. As a part of our research, test structures have been developed to detect structural defects in this technology. We also show detailed test results of those structures. It proves tha… Show more

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“…These errors could occur through a variety of real situations. For example, overlaps between layers in the epitaxially grown structure, intrinsic parasitic capacitances such as fringe effects, or defects in the Josephson junctions [48]. Unfortunately whilst these variations can be kept to a minimum by improved design and lithography, we cannot expect perfect structures, and once integrated and fabricated we cannot measure every capacitance directly.…”
Section: Energy Level Structurementioning
confidence: 99%
“…These errors could occur through a variety of real situations. For example, overlaps between layers in the epitaxially grown structure, intrinsic parasitic capacitances such as fringe effects, or defects in the Josephson junctions [48]. Unfortunately whilst these variations can be kept to a minimum by improved design and lithography, we cannot expect perfect structures, and once integrated and fabricated we cannot measure every capacitance directly.…”
Section: Energy Level Structurementioning
confidence: 99%