Textured Poling of the Ferroelectric Dielectric Layer for Improved Organic Field‐Effect Transistors

Abstract

the amorphous silicon benchmark of 1 cm 2 Vs −1 , application of organic FETs in displays and sensors have now become a reality. Organic FETs differ from metal oxide semiconductor FET (MOSFET) in several ways; most organic FETs operate in the accumulation region compared to the inversion operating region of MOSFETs. The metal-semiconductor and the semiconductor-dielectric interfaces play a vital role in charge transport properties. In particular, the dielectric interface is notorious for charge trapping. As a result, achieving intrinsic transport in the organic semiconductor layer in FET architectures is very challenging. Using the same organic semiconductor film (either evaporated or solution processed) but different dielectric layers may yield order of magnitude differences in FET carrier mobilities. On the other hand, ultrapure organic single crystals such as rubrene, grown from vapor phase, have shown intrinsic FET mobilities higher than 20 cm 2 Vs −1 . [2] Since the charge accumulation is directly proportional to the dielectric capacitance (C), where; κ being the dielectric constant, ε 0 the permittivity of free space, A the area of the capacitor, and d the thickness of the dielectric, a high value of the dielectric capacitance is required for lowering the operating voltage of FETs. Low-operating voltage FETs, therefore, demand high κ dielectrics, which are more difficult to achieve with polymeric materials compared to inorganic dielectric materials due to their inherently low κ values. Facile methods of preparing polymer dielectrics by appropriate choice of solvents result in thin (well below 100 nm) and pinhole-free films for low-operating voltage FETs. [3,4] Polymer ferroelectrics with higher values of κ compared to non-ferroelectric polymers allow an alternate route toward boosting the capacitance values in FETs. Poly(vinylidene fluoride) (PVDF) ferroelectric polymer and its copolymer such as PVDF trifluorethylene (PVDF-TrFE) with κ > 8 at room temperature have been extensively used in memory and pressure sensing applications. [5][6][7][8][9] Naturally, such dielectrics also provide a route toward low-operating voltage FETs. The vast range of work has utilized PVDF and its copolymers as a gate dielectric in organic FETs. [10][11][12][13] Design of PVDF with carbon quantum dots has opened applications in nanogenerators where the mechanical energy may be efficiently converted to electricity. [14] More recently, PVDF copolymers have been used with charge-modulated organic FETs for multimodal Polymer ferroelectrics are playing an increasingly active role in flexible memory application and wearable electronics. The relaxor ferroelectric dielectric, poly(vinylidene fluoride trifluorethylene (PVDF-TrFE), although vastly used in organic field-effect transistors (FETs), has issues with gate leakage current especially when the film thickness is below 500 nm. This work demonstrates a novel method of selective poling the dielectric layer. By using solutionprocessed 6,13-bis(triisopropylsilylethynyl)pentacene (TIPS-p...

Semiconductor/dielectric interface in organic field-effect transistors: charge transport, interfacial effects, and perspectives with 2D molecular crystals

“…Furthermore, in OFETs, charge transport is also affected by interfaces, which can even mask the intrinsic dependence of mobility on molecular structure and packing. As shown in Figure 1(a), the metal/semiconductor and semiconductor/dielectric interfaces are the places for the charge injection and transport, respectively, which play a fundamental role in the operation of OFETs [5,[59][60][61][62][63][64][65][66]. In particular, static structural and energetic disorder encountered by the charges moving along the interface results in percolation motion with certain sites becoming rate limiting for the transport along the interface [67][68][69].…”

Solution-Processed Organic and ZnO Field-Effect Transistors in Complementary Circuits

“…The film was poled at 135 • C for 30 min and at room temperature for 30 min. The temperature for annealing the film was chosen because it is just above the ferroelectric-paraelectric transition temperature of PVDF-TrFE [24]. The field was such that a negative bias was applied to the evaporated bottom-gate to ensure that the gate voltage during FET operation would not act to reorient the dipoles.…”

“…Gold electrodes of 50 nm were thermally evaporated onto the substrates which were patterned with a mask for a channel length of 1000 μm and a channel width of 50 μm. Prior work shows that an application of a lateral electric field parallel to the bottom of the PVDF-TrFE layer after vertical poling reduces the gate leakage current [24]. This texturepoling condition in another sample was achieved by evaporating aluminum electrodes which flank the central gate electrode on either side, as shown in Figure 1b.…”

“…Polymeric high κ ferroelectric dielectrics such as copolymers of polyvinylidene fluoride (PVDF) with trifluoroethylene (PVDF-TrFE) are advantageous in lowering the operating voltage as well as enhancing the performance of organic FETs [21][22][23][24]. Such ferroelectric dielectrics are particularly attractive for non-volatile memory applications and in sensing [25,26].…”

“…Such an interaction results in an increase in the effective mass of the carriers, and thus a decrease in carrier mobilities [29]. In a prior work, we have shown that electrical poling of the PVDF-TrFE layer is an effective means of enhancing carrier mobilities and other transport properties in FETs [24]. These poling methods can be divided into three categories: vertical poling, lateral poling, and texture-poling.…”