Graphene Nanosheet Field Effect Transistor (GNSFET) is constructed for the first time (using grapheme material) and simulated by Silvaco TCAD Tools it can be considered as a novelty work in Nanosheet FET design. This paper study and explore the effects of the device dimensions’ variation for 2-nanosheets GNSFET device. The variation in dimension of the gate length (Lg = 14,16 and 18) nm, gate width (Wg = 12,14 and 16) nm, and gate height (Hg = 6,7 and 8) nm are to be considered for the evaluation and optimization of the designed GNSFET performances. In addition, the performances and characteristics of the 2-nanosheets GNSFET device have been compared with that of 3- Nanosheets GNSFET device. Several nanosheet performance factors have been taken into consideration throughout the optimization process, including the following: on-current (ION), off-current (IOFF), ION/IOFF ratio, Sub threshold Swing (SS), Drain Induced Barrier Lowering (DIBL) and Trans conductance (gm). ION/IOFF ratio which represents the device switching capability is improved to 1.77e+10 at Lg=14 nm, Wg=14 nm and Hg=7 nm. The Sub Threshold Swing (SS) in this paper approaches the ideal value of 60 mV/dec which insure the device's improved gate control. The value of SS= 61.23 mV/dec at Lg = 18 nm, Wg=14 nm and Hg=7nm was obtained. The value of DIBL is between 1.28 mV/V and 31.05 mV/V. Finally, the resulted value of gm is 71.36 µS at Lg=14 nm, Wg=14 nm and Hg=7 nm.