The behavioral model of a split capacitor array involved in the successive approximation register ADC and taking into account the effect of parasitic capacitors

Osipov, Dmitry; Bocharov, Yu.; Butuzov, Vladimir

doi:10.1134/s1063739713040045

Cited by 4 publications

(1 citation statement)

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“…In the studies devoted to this problem, it was shown that the basic contribution to the nonlinearity error is made by the parasitic capacitance values of the capacitors and connecting buses [16][17][18][19]. In this case, if parasitic capacitances are binary-weighted, they do not influence the error of the differential nonlinearity but only lead to the conversion-scale error, which is easily corrected.…”

Section: Architecture Of the Adcmentioning

confidence: 99%

A multichannel analog-to-digital converter of signals of silicon photomultiplier arrays

2015

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An application specific integrated circuit (ASIC), consisting of nine basic channels and one auxiliary channel, each containing a 10-bit successive-approximation analog-to-digital converter (ADC), is designed and tested. The microcircuit also includes a buffer storage unit and a reference-voltage source. The microcircuit is intended for converting signals of silicon photomultiplier arrays. To decrease the differential nonlinearity of the ADC without recourse to autocalibration, a new method, based on introducing additional elements into the layout of ADC capacitor arrays, is proposed. The basic feature of the designed microcircuit, which is oriented at the application in the portable equipment with a self-contained power supply, is the low power consumption, which does not exceed 0.5 mW per channel at a sample frequency of 150 kHz.

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Section: Architecture Of the Adcmentioning

confidence: 99%