This paper treats the exploration of carrier (frequency/phase) synchronization methods for use in second generation of Digital Video Broadcasting -Return Channel via Satellite (DVB-RCS2). This new standard specifies reference bursts consisting of very limited number of known symbols and operation of turbo code decoder at extremely low Signal to Noise Ratio (SNR). The abovementioned constraints rule out most conventional carrier synchronization schemes and demand a careful investigation of algorithms with excellent communication performance and low hardware implementation complexity. In this paper, we present four different hardware architectures and demonstrate their communication performance, implementation complexity, throughput, and latency on a Xilinx FPGA.