2013
DOI: 10.2298/ntrp1304406d
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The comparison of gamma-radiation and electrical stress influences on oxide and interface defects in power VDMOSFET

Abstract: The behaviour of oxide and interface defects in n-channel power vertical double-diffused metal-oxide-semiconductor field-effect transistors, firstly degraded by the gamma-irradiation and electric field and subsequently recovered and annealed, is presented. By analyzing the transfer characteristic shifts, the changes of threshold voltage and underlying changes of gate oxide and interface trap densities during the stress (recovery, annealing) of investigated devices, it is shown that these two … Show more

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Cited by 8 publications
(6 citation statements)
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“…The changes in threshold voltage and mobility associated with electrical stressing and post-stress recovery in MOS transistors are known to originate from the complex electrochemical processes, which include the buildup of gate oxide charges and interface traps during the stress, as well as their removal (charge neutralization=annihilation and trap passivation) during the subsequent recovery, especially upon annealing. [7][8][9][10][11][12][15][16][17][18][19] For further analysis in this study, it is thus required to determine the underlying changes in the densities of gate oxide charges (ΔN ot ) and interface traps (ΔN it ). To clarify the mechanisms responsible for the phenomena observed, ΔN ot and ΔN it were determined by single transistor mobility (STM) 7) and subthreshold midgap (SMG) 21) techniques.…”
Section: Resultsmentioning
confidence: 99%
See 1 more Smart Citation
“…The changes in threshold voltage and mobility associated with electrical stressing and post-stress recovery in MOS transistors are known to originate from the complex electrochemical processes, which include the buildup of gate oxide charges and interface traps during the stress, as well as their removal (charge neutralization=annihilation and trap passivation) during the subsequent recovery, especially upon annealing. [7][8][9][10][11][12][15][16][17][18][19] For further analysis in this study, it is thus required to determine the underlying changes in the densities of gate oxide charges (ΔN ot ) and interface traps (ΔN it ). To clarify the mechanisms responsible for the phenomena observed, ΔN ot and ΔN it were determined by single transistor mobility (STM) 7) and subthreshold midgap (SMG) 21) techniques.…”
Section: Resultsmentioning
confidence: 99%
“…However, our research on the electrical stress and radiation effects in power VDMOS transistors, primarily in terms of their electrical parameter degradation, indicated that the application of electrical stress as a technique for radiation hardening could not lead to the expected results. 11,[16][17][18][19] This conclusion was particularly based on the behavior of channel carrier mobility observed during stress, recovery, and irradiation. Namely, the radiation-induced mobility degradation was lower in the stressed devices than in the virgin ones, but the mobility in the stressed devices was significantly reduced by the pre-irradiation electrical stress itself and was only partially restored by recovery treatment, so it remained below those in virgin devices over the entire range of radiation doses applied.…”
Section: Introductionmentioning
confidence: 98%
“…Considering that the main radiation effects on electrical parameters are caused by the creation of both N ot and N it , the changes in their densities (N ot and N it ) are very often analysed and discussed in the literature [8,15,33,[35][36][37]. In Fig.…”
Section: Radiation Effectsmentioning
confidence: 99%
“…43) However, subsequent investigations performed on power VDMOS transistors have clearly pointed to inapplicability of electrical stress for radiation hardening 44) and indicated only partial similarities between the effects of irradiation and electrical stress. 5,[45][46][47][48] Beside the above effects, negative bias temperature instability (NBTI) is observed in p-channel MOS transistors operated at temperatures ranging from 100 to 250 °C at gate voltages producing gate oxide electric fields in the range 2-6 MV=cm. 7,8) These electric fields and temperatures are typically found during the device burn-in tests, 26) but also can be approached in numerous applications during the routine operation of power MOS transistors at high current and voltage levels, which lead to both self heating and increased gate oxide fields.…”
Section: Introductionmentioning
confidence: 99%