In general, secure communication in a distributed system that spans physically insecure networks and hosts must be implemented using cryptography. Software hnplementations of cryptographic algorithms such as DES are much slower than typical network bandwidths. However, fast hardware implementations of these algorithms are being developed [4,61 and are projected to have encryption speeds comparable to network bandwidths (i z , 10-100 megabits per second). Current efforts at increasing the performance of hardware encryption are directed largely at increasing the speed of encryption within the device itself [5]. Less attention is being paid to the efficiency of the interface between the cryptographic hardware and the rest of the computer system. This research was supported by the Defense Advanced Research Projects Agency @OD), ARPA Order NO. 4871, monitored by the Naval Electronic Systems Command under Contract No. N00039-84-(2-0089, by the ZBM Corporation, by Olivetti S.p.k, by MICOM-Interlan, Inc., by CSELT S.p.A., and by the University of California under the MZCRO Program, Venkat Rangan is also supported by an ZBM Doctoral Fellowship. The views and conclusions contained in this document are those of the authors, and should not be interpreted as representing official policies, either expressed or implied, of any of the sponsoring agencies or corporations.