The Design of FPGA-Based Real Time Intrusion Detection NIC

Abstract

The amount of intrusion detection calculation based on software is heavy, which can not satisfy the needs of modern network bandwidth; the intrusion detection technology based on hardware is an ideal method for accelerating network processing. The thesis proposes a design scheme for FPGA-based real time intrusion detection NIC, and introduces the hardware and software structure of the system n details. The system communicates with the operation system directly via PCI bus, achieves the organic combination of software detection and hardware detection, and overcomes the slow response speed of the system when only software is used for intrusion detection. In system hardware detection, with FPGA as core, arranging various intrusion detection algorithms in FPGA for parallel running can improve the real time and reliability of the system.