The development and evaluation of RF TSV for 3D IPD applications

High-resolution X-ray computed tomography of through silicon vias for RF MEMS integrated passive device applications

“…This gray level contrast difference of the open TSVs is a consequence of variations in the thickness of the Cu plating inside the vias, as confirmed by mechanical cross-sectioning and reported in [3]. These Cu plating thickness variations, in TSVs all connected to a large area redistribution layer (RDL), were design related, and most likely caused by different switching current density distributions during electroplating [4]. Based on these failure analysis findings, a new plating procedure has already been established [3].…”

“…The RF properties of the TSVs were tested by using coplanar transmission lines and showed a high performance with very low losses [4,5]. In addition, RF IPD 3D inductors were fabricated by using the RF TSVs as wafer through connections, demonstrating a well-working application of the TSVs [3].…”

Wide temperature range through silicon vias made of Invar and spin-on glass for interposers and MEMS

“…This paper specifically aims to demonstrate a TSV structure reaching through unthinned wafers and being applicable to systems undergoing large temperature variations such as those in automotive environments where temperatures can range between 200 °C [2] and very low ambient temperatures. TSVs through unthinned wafers are needed for rigid interposers so that an additional organic package substrate is not necessary for support [3] and complicated thin wafer handling is avoided. In addition, long TSVs allow electrical connections through thick MEMS device or capping wafers [4] when necessary.…”

Multilayer ferromagnetic composites enabling on-chip magnetic-core inductors beyond 1 GHZ

“…If regular CZ Si-wafers had been used with low resistivity (≦100 Ω-cm), the magnetic fields would penetrate deeply into the substrate causing losses and reducing both the inductance and Q-factor [8], and be a lossy medium for RF signals [9]. The purpose to use thin Siwafers is to be able integrate the magnetic process flow with Silex established Cu-metalized TSV process flow [2], which requires 305 µm wafers. The wafers were thermally oxidized with 1 µm SiO 2 , and 0.5 µm of TiW was deposit, acting as a barrier and adhesion layer.…”

“…The currently available on-chip integrated inductors, used as passives in RF ICs or system-on-package interposers are employed as air-core inductors with a maximum inductance density of 200 nH/mm 2 [1]. Previous presented work on RF TSVs enabling 3D integration using Silex Met-Via® TSV as a key element for 3D inductors, showed high Q-factor (>30) and selfresonance frequency (> 6 GHz) for inductors in the range of 1-15 nH [2], Figure 1 b). To enhance the performance of 3D inductors it is desirable to increase both the inductance density and the quality factor, however inductors with higher quality factors tend to have lower inductance density.…”