The effects of compiler options on application performance

Stewart, Kirk; White, Sam

doi:10.1109/iccd.1994.331921

Cited by 3 publications

(4 citation statements)

References 1 publication

Supporting

Mentioning

Contrasting

Order By: Relevance

“…2) Use manual optimization techniques [1] to reduce computational overhead and roadblocks to compiler optimization. 3) Add compiler switches [2] for level optimization to reduce execution time. The numerical results of the program need to be compared to the original solution as some compiler switches can alter the semantics of the program.…”

Section: Discussionmentioning

confidence: 99%

“…Stewart [2] provides a comparison of the execution time saving benefits of common compiler switches and information on which compiler switches to implement to reduce execution time. However, a comparison between manual implementation of a corresponding compiler switch (such as manual in-lining of subroutines) and use of the compiler switch is not made by Stewart.…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

A Probabilistic Power Prediction Tool for the Xilinx 4000-Series FPGA

Osmulski

Muehring

Veale

et al. 2000

Lecture Notes in Computer Science

View full text Add to dashboard Cite

The importance of properly optimizing code for execution on super-scalar processors was investigated. Access to the domain specialist was not available during the optimization investigation. For this study of an existing serial FORTRAN application, the use of compiler switches, manual coding techniques, a commercial preprocessor utility (KAP), and a commercial parallelization utility (FORGE) showed the potential to affect execution performance by more than an order of magnitude. The application for the case study was a three-dimensional boundary element code that modeled spherical particle transport phenomena in a particle suspension. Separate experiments were conducted using two different processor platforms: a four node IBM SP (160Mhz POWER2 CPU) and a single node DEC Alpha (667Mhz 21164 CPU).Execution times for the non-optimized, serial base case were 72 hours on a single IBM SP node and 66 hours on the DEC Alpha. Using a combination of compiler switches and manual optimizations, such as in-lining of inefficient subroutines, execution times were reduced to 7.5 hours on a single IBM SP node and 5.4 hours on the DEC Alpha. The use of the KAP pre-processor reduced execution time to 2.3 hours on the single IBM SP node. Using the parallelization software FORGE and four nodes on the IBM SP resulted in an execution time of 25.8 hours without compiler optimization and 3.0 hours using compiler switches for optimization.

show abstract

Section: Discussionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

A Probabilistic Power Prediction Tool for the Xilinx 4000-Series FPGA

Osmulski

Muehring

Veale

et al. 2000

Lecture Notes in Computer Science

View full text Add to dashboard Cite

show abstract

“…Performance characteristics of an application are found to be dependent on the type of compiler options used [5]. Software developers depend on compiler optimizations to attain the required performance characteristics from current day applications, which are becoming more complex and bigger in size.…”

Section: Introductionmentioning

confidence: 99%

“…Architecture aware compilers exploit the hardware features and contribute to maximizing the application performance. Compiler/hardware interaction leads to performance improvements attained through path length reduction, efficient instruction selection, pipelining scheduling and memory penalty minimization [5].…”

Section: Introductionmentioning

confidence: 99%

Execution characteristics of SPEC CPU2000 benchmarks

Gurumani

Milenkovic

2004

Proceedings of the 42nd Annual Southeast Regional Conference

View full text Add to dashboard Cite

Modern processors include features such as deep pipelining, multilevel cache hierarchy, branch predictors, out of order execution engine, and advanced floating point and multimedia units. To successfully exploit these features, architecture-aware compilers that can produce target-specific optimal codes for the applications are needed. Using the knowledge about the architectural features, the compilers can contribute to maximizing the application performance through effective pipeline scheduling, memory penalty minimization and path length reduction. A study of the execution characteristics for the binaries generated by the various compilers can provide insights about the effectiveness of the optimization options used in the compilers. The in-built performance monitoring hardware found in present day processors can be used to collect the performance metrics for the study of execution characteristics. In this paper, we compare the Intel C++ and Microsoft VC++ compilers by studying the execution characteristics of SPEC CPU 2000 benchmarks run on a Pentium IV processor. The benchmarks were compiled with identical optimization switches in both compilers and the performance metrics were collected using Intel's VTune Performance Analyzer. The analyses of results showed that the Intel C++ compiler performed better than VC++ for all considered applications and significantly better for computer visualization and graphical applications.

show abstract