The Experimental Demonstration of a SASP-Based Full Software Radio Receiver

Abstract

International audienceMany technological bottlenecks prevent from realizing a software radio (SR) mobile terminal. The old way of building radio architectures is now over because a single handled terminal has to address various communication standards. This paper exposes a SR receiver: a sampled analog signal processor (SASP) is designed to perform downconversion and channel presorting. The idea is to process analog voltage samples in order to recover in baseband any RF signal emitted from 0 to 5$~$GHz. An analog fast Fourier transform achieves both frequency shifting and filtering. An experimental demonstrator of the SASP using 65$~$nm CMOS technology from STMicroelectronics is here presented and measured. It validates the concept of a new SR receiver with the design of a demonstrator which runs at 1.2 GHz consuming 389 mW

Wide-band rejection of interfering signals

“…That is why every signal envelope is received. A demonstrator of the SASP was fabricated in 65nm CMOS technology from STMicroelectronics [2]. It validates the feasibility of a the circuit and its application to Software Radio (figures 2 and 3).…”

Broadband Direct RF Digitization Receivers

“…This moving average FIR filter (all-ones coefficients) places notches at multiple frequencies of Besides discrete analog signal processing in the time-domain, research is also conducted on analog implementations of FFT ( [51], [52]): in the context of software radio systems using OFDM, the move from DSP-based FFT to analog-based FFT allows filtering narrowband interferers prior to analog-to-digital conversion, which leads to a more robust receiver. In addition, analog implementations make high-speed low-power FFT possible: [52] demonstrates a 1GSps 8-points DT complex FFT consuming 25 mW in CMOS 0.13um.…”

Full Software Radio transceivers

“…The idea first proposed in [2] and experimentally demonstrated in [3] relies on the principle of rejecting the carrier while processing the RF signal taking care of solely its envelope and its instantaneous phase, as some system level simulator are doing, using a Fast Fourier Transform (FFT). The architecture coming from that principle is depicted in Fig.…”

“…7 is depicted a microphotograph of the new version of the SASP, the SASP1.5. This circuit is an evolution of the initial SASP of [3]. It has been manufactured in 2013 using the same 65nm CMOS technology from ST Microelectronics and presents improved performances together with a dramatically reduced power consumption.…”