The flexible processor an approach for single-chip hardware emulation by dynamic reconfiguration

Abstract

A dynamically reeonfigurable logic array, i.e., the Flexible Processor, suitable for a single chip emulation system is developd. It demonstrates the sequential execution of several sub-circuits divided temporally from an original large circuit In order to accelerate emulation speed, a logic element, reducing total Configuration data by 30% compared to conventional Look-UpTable, and Temporal Communication Module (TCM) to support savdrestore of circuit state and data communication among divided sub-circuits, are implemented on the Flexible processor.