To determine the interlayer effect on dielectric features and conductivity, Au/n-Si (S0), Au/PVC/p-Si (S1), and Au/PVC:Gt-GO/p-Si (S2) type SDs were grown onto the same n-Si wafer and their admittance measurements performed between 100 Hz and 1 MHz. The observed decrease in C and G/ω values as frequency increases shows that the charges at the interface-states (N
ss) can easily follow ac-signal and supply an excess capacitance and conductance at lower frequencies. Using C and G/ω data at 1.5 V, the dielectric-constant (ϵ′), dielectric-loss (ϵ″), and loss-tangent (tan δ) were obtained as a function of frequency. To determine the relaxation processes in (PVC:Gt-GO) nanocomposite, complex-dielectric (M′ and M′′) formalism was also explored in the whole frequency range. The value of ac electrical conductivity (σ
ac) remained independent of frequency until 0.1 MHz and then started to increase exponentially which corresponds to dc and ac conductivity. As compared to S1 and S2 with So SD, the conductivity and ϵ′ values increase due to the PVC and (PVC:Gt-GO) interlayer. The Ln(σ
ac)-Ln(ω) plots were also drawn to analyze the conduction process and their slopes were found as 0.09, 0.39, and 0.58 for S0, S1, and S2 SD, respectively. These results show that the interaction and trap levels of the electron–hole pairs at lower frequencies, as well as from the well-localized relaxation mechanism at higher frequencies.