2015
DOI: 10.4071/imaps.458
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The Impact of Hydrogen Gas Evolution on Blister Formation in Electroless Cu Films

Abstract: Electroless Cu plating is a key process to provide electrically conductive layers on insulating substrates for the subsequent Cu electroplating of printed-circuit boards (PCBs). Recently introduced substrate materials are prone to spontaneous delamination failure (blistering) of the electroless layer during deposition. A higher Ni content in electroless Cu baths prevents delamination failure by increasing the internal tensile stress in the Cu layer. This effect is achieved by suppressing Cu self-diffusion thro… Show more

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Cited by 12 publications
(6 citation statements)
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“…The inclusion of Ni 2+ in formaldehyde electroless deposition baths is frequently used to control deposit stress, to avoid blistering, and possibly reduce hydrogen incorporation from formaldehyde. [16][17][18] Ni in solution will co-deposit with Cu as metallic Ni creating a Cu(Ni) alloy deposit containing between 1%-6% Ni. 16,19 PHI-TRIFT-TOF-SIMS data indicates that Ni will aggregate at Cu grain boundaries.…”
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“…The inclusion of Ni 2+ in formaldehyde electroless deposition baths is frequently used to control deposit stress, to avoid blistering, and possibly reduce hydrogen incorporation from formaldehyde. [16][17][18] Ni in solution will co-deposit with Cu as metallic Ni creating a Cu(Ni) alloy deposit containing between 1%-6% Ni. 16,19 PHI-TRIFT-TOF-SIMS data indicates that Ni will aggregate at Cu grain boundaries.…”
mentioning
confidence: 99%
“…[16][17][18] Ni in solution will co-deposit with Cu as metallic Ni creating a Cu(Ni) alloy deposit containing between 1%-6% Ni. 16,19 PHI-TRIFT-TOF-SIMS data indicates that Ni will aggregate at Cu grain boundaries. 16 The mechanism for stress mitigation in the presence of Ni has been suggested to involve diminished Cu diffusion into and out of the grain boundaries due to aggregated Ni incorporation at those grain boundaries.…”
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“…The nano-voids are formed when hydrogen gas released by a reducing agent is trapped inside the deposited layer, or when growing copper grains are inappropriately joined, creating an empty space between them. [2][3][4][5] Generally, the electroless plated copper layer is much thinner than the electroplated copper layer; thus, it has received relatively little attention and its impact on reliability has been overlooked. However, as the number of stacked PCB circuits increased and the circuit became more complex, the size of the vertical interconnects access (via) decreased, and accordingly, the influence of the thin electroless copper layer on the via-crack increased.…”
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confidence: 99%