The impact of new technology on soft error rates

Dixit, Ashutosh; Wood, Alan

doi:10.1109/irps.2011.5784522

Cited by 254 publications

(111 citation statements)

References 7 publications

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“…The main cause of soft errors in microprocessors is high energy particle strikes. The experiments with high energy particle strikes conducted by Dixit et al [8] are not feasible in academic studies such as the one presented in this paper. An acceptable alternative to these experiments is the use of statistical fault injections (SFI) into a microarchitectural model of a processor.…”

Section: Methodsmentioning

confidence: 94%

Efficient soft error protection for commodity embedded microprocessors using profile information

Khudia

Wright

Mahlke

2012

Proceedings of the 13th ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, Tools and Theory for Embedded Syst

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Successive generations of processors use smaller transistors in the quest to make more powerful computing systems. It has been previously studied that smaller transistors make processors more susceptible to soft errors (transient faults caused by high energy particle strikes). Such errors can result in unexpected behavior and incorrect results. With smaller and cheaper transistors becoming pervasive in mainstream computing, it is necessary to protect these devices against soft errors; an increasing rate of faults necessitates the protection of applications running on commodity processors against soft errors. The existing methods of protecting against such faults generally have high area or performance overheads and thus are not directly applicable in the embedded design space. In order to protect against soft errors, the detection of these errors is a necessary first step so that a recovery can be triggered.To solve the problem of detecting soft errors cheaply, we propose a profiling-based software-only application analysis and transformation solution. The goal is to develop a low cost solution which can be deployed for off-the-shelf embedded processors. The solution works by intelligently duplicating instructions that are likely to affect the program output, and comparing results between original and duplicated instructions. The intelligence of our solution is garnered through the use of control flow, memory dependence, and value profiling to understand and exploit the common-case behavior of applications. Our solution is able to achieve 92% fault coverage with a 20% instruction overhead. This represents a 41% lower performance overhead than the best prior approaches with approximately the same fault coverage.

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Section: Methodsmentioning

confidence: 94%

Efficient soft error protection for commodity embedded microprocessors using profile information

Khudia

Wright

Mahlke

2012

Proceedings of the 13th ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, Tools and Theory for Embedded Syst

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“…The same detectors can be used for memories as well as logic components [6,12]. Current studies show that only the particles that have energies larger than 10MeV when they hit can cause soft-errors [6,21].…”

Section: Acoustic Wave Detectors: Detection Of Particle Strikesmentioning

confidence: 99%

Avoiding core's DUE & SDC via acoustic wave detectors and tailored error containment and recovery

Upasani

Vera

González

2014

SIGARCH Comput. Archit. News

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“…As a consequence of this most crucial and confl ict transformation in process technology, the modern VLSI circuits exhibit substantially high Soft Error Rates [SERs] [1,2].…”

Section: Introductionmentioning

confidence: 99%

Black box model-based self healing solution for stuck-at-faults in combinational circuits

Meyyappan

Alamelumangai

2017

IRASE

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The paper unveils a black box model-based self healing strategy to suppress the ill effects of stuck-at-faults occurring in combinational circuits. The primary theory endeavours to attach a sense of reliability in the performance of digital systems and makes them insensitive to the negative impact of faults present in the system. The proposed methodology employs a dynamic fault tolerant approach to protect digital systems from the incursion of stuck-at-faults and enables the system to come up with fault free outputs. The simulation results affi rm the authenticity of the proposed strategy to cancel out the infl uence of faults and facilitate the system to heal itself. The work utilizes the attributes of an FPGA to demonstrate the practical viability of the proposed approach. The performance analysis endorses the defi nite dominance of the proposed healing scheme over the traditional Triple Modular Redundancy [TMR] in terms of fault coverage and area overhead.

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The impact of new technology on soft error rates

Cited by 254 publications

References 7 publications

Efficient soft error protection for commodity embedded microprocessors using profile information

Efficient soft error protection for commodity embedded microprocessors using profile information

Avoiding core's DUE & SDC via acoustic wave detectors and tailored error containment and recovery

Black box model-based self healing solution for stuck-at-faults in combinational circuits

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