2007
DOI: 10.1016/j.jpdc.2007.03.005
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The impact of wrong-path memory references in cache-coherent multiprocessor systems

Abstract: The core of current-generation high-performance multiprocessor systems is out-of-order execution processors with aggressive branch prediction. Despite their relatively high branch prediction accuracy, these processors still execute many memory instructions down mispredicted paths. Previous work that focused on uniprocessors showed that these wrong-path (WP) memory references may pollute the caches and increase the amount of cache and memory traffic. On the positive side, however, they may prefetch data into th… Show more

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Cited by 7 publications
(1 citation statement)
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References 21 publications
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“…Research results of [12] show that these WP memory references can increase the amount of cacheto-cache transfers by 32%, invalidations by 8% and 20% for broadcast and directory-based SMPs, respectively, and the number of write backs by up to 67% for both systems. In order to reduce the performance impact of these WP memory references, they introduce two simple mechanisms-filtering WP blocks that are not likely-to-be-used and WP aware cache replacement-that get speedups of 37%.…”
Section: Related Workmentioning
confidence: 99%
“…Research results of [12] show that these WP memory references can increase the amount of cacheto-cache transfers by 32%, invalidations by 8% and 20% for broadcast and directory-based SMPs, respectively, and the number of write backs by up to 67% for both systems. In order to reduce the performance impact of these WP memory references, they introduce two simple mechanisms-filtering WP blocks that are not likely-to-be-used and WP aware cache replacement-that get speedups of 37%.…”
Section: Related Workmentioning
confidence: 99%