The Impacts of Ferroelectric and Interfacial Layer Thicknesses on Ferroelectric FET Design

Tasneem, Nujhat; Islam, Muhammad Mainul; Wang, Zheng; Chen, Hang; Hur, Jae; Triyoso, Dina H.; Consiglio, Steven; Tapily, Kandabara; Clark, Robert D.; Leusink, Gert J.; Yu, Shimeng; Chern, Winston; Khan, Asif Islam

doi:10.1109/led.2021.3088388

Cited by 24 publications

(4 citation statements)

References 20 publications

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“…And it has been widely used in the judicial procedures of many sports events. In order to improve the level of sports competition, more and more countries continue to apply new technologies to sports competitions [19]. The clear 3D animation display, the rapid response within a few seconds, and the pressure line or out-of-bounds gap accurate to the millimeter are all showing the world the convenience and precision that high-tech brings us.…”

Section: Introductionmentioning

confidence: 99%

[Retracted] Realization of a Noncontact IC Chip with Embedded Ferroelectric Memory in an Auxiliary Timing Device for Sports Games

Chen

2022

Journal of Nanomaterials

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The research direction of the new generation of embedded memory can be summarized into two types of embedded nonvolatile memory and embedded volatile memory; the research on online testing of embedded memory started in the past ten years, and there are few research results. This article analyzes the feasibility of the noncontact IC chip in the embedded ferroelectric memory of the sports game auxiliary timing device and is aimed at obtaining an optimized embedded ferroelectric memory by analyzing the relevant data to achieve the update and update of the sports game timing device system. Early sports event timing methods generally use manual timing (stopwatch) or camera shooting timing; this method is inefficient, poor real-time, huge workload, and prone to errors. This research mainly focuses on the analysis and discussion of the material structure and performance of the embedded ferroelectric memory and the process of noncontact IC chip. This article uses custom welding circuit technology to prepare the best ferroelectric filter in the test part and verifies the influence of temperature on the material; in order to understand the properties of ferroelectric materials at the electronic and atomic level, a first-order statistical method is obtained. The numerical calculation results of the experiment verify that the evaluation value of the serial port synchronization module as a whole exceeds the pulse synchronization; the network synchronization as a whole exceeds the code synchronization, and the result of the network time service module is the opposite, but as a whole, each module of the noncontact IC chip has strong performance adaptability; in the application of auxiliary timing, the maintainability of noncontact IC chip is quite outstanding, and the maximum value is 7.97; a large number of complex simulation system tasks can be completed by simple and direct tasks.

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Section: Introductionmentioning

confidence: 99%

[Retracted] Realization of a Noncontact IC Chip with Embedded Ferroelectric Memory in an Auxiliary Timing Device for Sports Games

Chen

2022

Journal of Nanomaterials

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“…The asymmetric hysteresis loop in the positive and negative directions is due to the different electrode materials in terms of the work function of the p + Si bottom electrode and the W top electrode. As is well known, the absence of an interfacial layer is of vital importance for good ferroelectric function, due to the fact that the interfacial layer acts as the barrier which inhibits ferroelectric switching [26]. Interestingly, the capacitor with the TiN electrode, lacking an interfacial layer, exhibits remanent polarization smaller than that with a ZrO 2 interfacial layer.…”

Section: Resultsmentioning

confidence: 99%

Impact of Pre-Annealed ZrO2 Interfacial Layer on the Ferroelectric Behavior of Hf0.5Zr0.5O2

Yuan,

Liu,

et al. 2023

Electronics

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This work systematically investigates the impact of a pre-annealed ZrO2 interfacial layer on the ferroelectric behavior of Hf0.5Zr0.5O2 (HZO) capacitors. The remanent polarization (2Pr) value of HZO capacitors, including configurations such as W/HZO/TiN/p+ Si, W/HZO/(pre-annealed) ZrO2/TiN/p+ Si, W/HZO/SiO2/TiN/p+ Si, and W/HZO/SiO2/p+ Si, exhibits significant variations. The W/HZO/(pre-annealed) ZrO2/TiN/p+ Si capacitor demonstrates superior ferroelectric performance, with a 2Pr value of ~32 µC/cm2. Furthermore, by optimizing the thickness combination of HZO and the pre-annealed ZrO2 interfacial layer, a capacitor with a 10 nm HZO and 2 nm ZrO2 achieves the largest 2Pr value. The pre-annealing process applied to ZrO2 is found to play a very important role in inducing the orthorhombic phase and thus enhancing ferroelectricity. This enhancement is attributed to the pre-annealed 2 nm ZrO2 interfacial layer acting as a structural guide for the subsequent HZO orthorhombic phase, thereby improving the ferroelectric performance of HZO capacitors. These findings provide a comprehensive explanation and experimental verification of the impact of pre-annealed ZrO2 on ferroelectric devices, offering novel insights for the optimization of ferroelectric properties.

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“…FEFET technology faces a critical challenge with respect to its write voltage, i.e., the voltage required to switch ferroelectric polarization in the FEFET structure. State-of-the art, Si-based FEFETs require at least 3–6 V for deterministic switching. − Conversely, for compatibility with logic circuits in embedded applications, the write voltage needs to be decreased below 1.5 V . This challenge arises in part because during the deposition of the ferroelectric layer on Si in the standard transistor fabrication processes, an interfacial SiO 2 layer forms.…”

Section: Introductionmentioning

confidence: 99%

Remote Oxygen Scavenging of the Interfacial Oxide Layer in Ferroelectric Hafnium–Zirconium Oxide-Based Metal–Oxide–Semiconductor Structures

Tasneem

Kashyap

Chae

et al. 2022

ACS Appl. Mater. Interfaces

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Discovery of ferroelectricity in HfO2 has sparked a lot of interest in its use in memory and logic due to its CMOS compatibility and scalability. Devices that use ferroelectric HfO2 are being investigated; for example, the ferroelectric field-effect transistor (FEFET) is one of the leading candidates for next generation memory technology, due to its area, energy efficiency and fast operation. In an FEFET, a ferroelectric layer is deposited on Si, with an SiO2 layer of ∼1 nm thickness inevitably forming at the interface. This interfacial layer (IL) increases the gate voltage required to switch the polarization and write into the memory device, thereby increasing the energy required to operate FEFETs, and makes the technology incompatible with logic circuits. In this work, it is shown that a Pt/Ti/thin TiN gate electrode in a ferroelectric Hf0.5Zr0.5O2 based metal-oxide-semiconductor (MOS) structure can remotely scavenge oxygen from the IL, thinning it down to ∼0.5 nm. This IL reduction significantly reduces the ferroelectric polarization switching voltage with a ∼2× concomitant increase in the remnant polarization and a ∼3× increase in the abruptness of polarization switching consistent with density functional theory (DFT) calculations modeling the role of the IL layer in the gate stack electrostatics. The large increase in remnant polarization and abruptness of polarization switching are consistent with the oxygen diffusion in the scavenging process reducing oxygen vacancies in the HZO layer, thereby depinning the polarization of some of the HZO grains.

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The Impacts of Ferroelectric and Interfacial Layer Thicknesses on Ferroelectric FET Design

Cited by 24 publications

References 20 publications

[Retracted] Realization of a Noncontact IC Chip with Embedded Ferroelectric Memory in an Auxiliary Timing Device for Sports Games

[Retracted] Realization of a Noncontact IC Chip with Embedded Ferroelectric Memory in an Auxiliary Timing Device for Sports Games

Impact of Pre-Annealed ZrO2 Interfacial Layer on the Ferroelectric Behavior of Hf0.5Zr0.5O2

Remote Oxygen Scavenging of the Interfacial Oxide Layer in Ferroelectric Hafnium–Zirconium Oxide-Based Metal–Oxide–Semiconductor Structures

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