The Implementation of Synchronous Dataflow Graphs Using Reconfigurable Hardware

Edwards, Marc B.; Green, Peter

doi:10.1007/3-540-44614-1_78

Cited by 6 publications

(6 citation statements)

References 10 publications

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“…This is particularly evident when dataflow models are targeted for hardware implementations. Prior efforts are conservative in their implementation of the glue logic to stitch SDF actors in hardware [4,[8][9][10]. SDF-AP is introduced in [19] to remedy that deficiency.…”

Section: Related Workmentioning

confidence: 99%

Static dataflow with access patterns

Ghosal

Limaye

Ravindran

et al. 2012

Proceedings of the 49th Annual Design Automation Conference

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Signal processing and multimedia applications are commonly modeled using Static/Cyclo-Static Dataflow (SDF/CSDF) models. SDF/CSDF explicitly specifies how much data is produced and consumed per firing during computation. This results in strong compile-time analyzability of many useful execution properties such as deadlock absence, channel boundedness, and throughput. However, SDF/CSDF is limited in its ability to capture how data is accessed in time. Hence, using these models often leads to implementations that are sub-optimal (i.e., use more resources than necessary) or even incorrect (i.e., use insufficient resources). In this work, we advance a new model called Static Dataflow with Access Patterns (SDF-AP) that captures the timing of data accesses (for both production and consumption). This paper formalizes the semantics of SDF-AP, defines key properties governing model execution, and discusses algorithms to check these properties under correctness and resource constraints. Results are presented to evaluate these analysis algorithms on practical applications modeled by SDF-AP.

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Section: Related Workmentioning

confidence: 99%

Static dataflow with access patterns

Ghosal

Limaye

Ravindran

et al. 2012

Proceedings of the 49th Annual Design Automation Conference

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“…Most works on software synthesis are based on the work on static scheduling of SDF models but typically they do not take into account costs like area and system performance. In [6] a method for generating hardware from SDF models is proposed based on existing work on software synthesis. While it includes proposals for different hardware architectures, it does not explicitly consider any modelling language or tool-based design automation.…”

Section: Related Workmentioning

confidence: 99%

SystemC-AMS SDF model synthesis for exploration of heterogeneous architectures

Popp

Herrholz

Griittner

et al. 2010

13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems

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Cost efficient design of embedded HW/SW systems that need to meet certain requirements is a complex task due to the huge number of possible solutions, the "design space". Design space exploration methods depend on the designers' input in terms of application description, target architecture, and cost estimates for implementation alternatives. Obtaining feasible pre-implementation cost estimates causes lots of effort since the designer does not have confident information before implementation on the target architecture, or even different target architectures, has been performed.In this paper we present a methodology suitable for automatic cost estimation of synchronous data flow (SDF) graphs. We propose to start from an executable SystemC-AMS SDF specification, and demonstrate its automatic transformation and implementation for cost estimation on heterogeneous HW/SW architectures. The presented methodology allows the estimation of both HW and SW implementation alternatives of each SDF node based on a quick synthesis approach. These cost estimates are fed to a mapping framework to obtain a static binding and schedule for the architectures under exploration. With the proposed methodology the designer does not have to perform full synthesis and implementation for design space exploration. This is demonstrated by a case study of a Bluetooth baseband unit considered for implementation on a Xilinx Virtex-5 FPGA.

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“…When describing the refinement of models, we concentrate on the synchronous dataflow model of computation, which has been found to describe efficient structures in both software, 8 and hardware. 50,17 In either case, this refinement process must generate an implementation that preserves the semantics of the original model (i.e. the partial ordering of iterations and the pattern of communication), while attempting to minimize cost of implementation.…”

Section: Actor-oriented Model Refinementmentioning

confidence: 99%

Actor-Oriented Design of Embedded Hardware and Software Systems

Lee

Neuendorffer

Wirthlin

2003

J CIRCUIT SYST COMP

171

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In this paper, we argue that model-based design and platform-based design are two views of the same thing. A platform is an abstraction layer in the design flow. For example, a core-based architecture and an instruction set architecture are platforms. We focus on the set of designs induced by this abstraction layer. For example, the set of all ASICs based on a particular core-based architecture and the set of all x86 programs are induced sets. Hence, a platform is equivalently a set of designs. Model-based design is about using platforms with useful modeling properties to specify designs, and then synthesizing implementations from these specifications. Hence model-based design is the view from above (more abstract, closer to the problem domain) and platform-based design is the view from below (less abstract, closer to the implementation technology). One way to define a platform is to provide a design language. Any valid expression in the language is an element of the set. A platform provides a set of constraints together with known tradeoffs that flow from those constraints. Actor-oriented platforms, such as Simulink, abstract aspects of program-level platforms, such as Java, C++, and VHDL. Actor-oriented platforms orthogonalize the actor definition language and the actor composition language, enabling highly polymorphic actor definitions and design using multiple models of computation. In particular, we concentrate on the use of constrained models of computation in design. The modeling properties implied by well chosen constraints allow more easily understood designs and are preserved during synthesis into program-level descriptions. We illustrate these concepts by describing a design framework built on Ptolemy II.

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The Implementation of Synchronous Dataflow Graphs Using Reconfigurable Hardware

Cited by 6 publications

References 10 publications

Static dataflow with access patterns

Static dataflow with access patterns

SystemC-AMS SDF model synthesis for exploration of heterogeneous architectures

Actor-Oriented Design of Embedded Hardware and Software Systems

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