Abstract:A reduction of gate depletion and DC characteristics in CMOS transistors with poly‐Si/SiGe Gate stack fabricated with local CMOS process is presented. Our local CMOS process uses a single n+ doped, poly‐Si/SiGe gate material. After deposition, both the poly‐Si and the SiGe used as gate layers were implanted by phosphorus ions. The parameters on threshold, sub‐threshold and low frequency noise 1/f of poly‐Si/SiGe CMOS transistors are reported. Our results demonstrate that the shift in threshold voltage due to t… Show more
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