The interface between silicon and a high-k oxide

Abstract

The ability to follow Moore's Law 1 has been the basis of the tremendous success of the semiconductor industry in the past decades. To date, the greatest challenge for device scaling is the required replacement of silicon dioxide-based gate oxides by high-k oxides in transistors. Around 2010 high-k oxides are required to have an atomically defined interface with silicon without any interfacial SiO 2 layer. The first clean interface between silicon and a high-K oxide has been demonstrated by McKee et al. 2 Nevertheless, the interfacial structure is still under debate. Here we report on first-principles calculations of the formation of the interface between silicon and SrTiO 3 and its atomic structure. Based on insights into how the chemical environment affects the interface, a way to engineer seemingly intangible electrical properties to meet technological requirements is outlined. The interface structure and its chemistry provide guidance for the selection process of other high-k gate oxides and for controlling their growth. Our study also shows that atomic control of the interfacial structure can dramatically improve the electronic properties of the interface. The interface presented here serves as a model for a variety of other interfaces between high-k oxides and silicon.According to the International Technology Roadmap for Semiconductors 3 , gate oxides shall be scaled to a thickness below 1.5 nm as early as 2005. This corresponds to only a few atomic layers. Due to the quantum mechanical tunneling effect, electrons can pass directly through such a thin layer of an insulating material resulting in large static power consumption. Since about five years ago, intense research has been performed to replace silicon dioxide related materials with other oxides that have a higher dielectric constant (high-k). This would allow the use of a thicker gate oxide while retaining the electrical properties of an ultrathin

Ordering of TiO2-Based Nanostructures on SrTiO3(001) Surfaces

“…[4][5][6][7][8][9][10][11][12][13][14][15][16][17][18][19] Interest in SrTiO 3 stems from its applications as a substrate for high-T c superconductors, 20 in photocatalysis, 21 in ferroelectrics, 22 and as a buffer material for micro/nanoelectronic systems. [23][24][25] This is because SrTiO 3 boasts a number of attractive properties, including a highdielectric constant (high-κ) and suitable lattice parameter (0.3905 nm) for interfacing with other functional materials.…”

Multiscale Materials Modelling: Case Studies at the Atomistic and Electronic Structure Levels

“…In this way electronic defects such as broken bonds can be identified. The interface involving silicon (Si) and strontium titanate (SrTiO 3 ) [37] is the example that has been recently studied [2,16]. It was found that a specific coverage of one half monolayer of Sr atoms will chemically saturate the silicon substrate (leaving no dangling bonds), as the left panel of Figure 13.…”

“…Neither the chemically saturated interface nor the dependence of the insulating behavior on the stoichiometry at the interface could have been addressed using classical, interatomic potentials. Further discussions may be found in references [2,16,17]. …”

Direct Epitaxial Integration of the Ferromagnetic Semiconductor EuO with Silicon for Spintronic Applications

“…Each metal atom donates 2 electrons and, therefore, each dangling bond becomes occupied by an electron pair. As a result, this structure has no surface states in the band gap of the host [46], which is rather important for applications. The presence of a band gap adds to the resistance of the surface to oxidation [47] although one should note that both theory [48] and experiments [49] predict the silicide to become partly oxidized with formation of M-O-Si bonds.…”