“…Unfortunately, high temperatures have shown to be very harmful for oxide layers in SiC MOSFETs [34], [35] and, therefore, this is one of the limiting factors for OC capability at present. The third difference is that SiC has a much higher Young's modulus than Si [36], [37], which implies that a SiC die is much stiffer than its Si counterpart, and that this difference in stiffness results in larger thermomechanical stresses, especially in the die attach [17], [18] [19], [20] [21] [22], [20], [16] [23] [24] below the corners of the chip during OC events [38]. This problem is accentuated as the chip size increases and, hence, it relates to the fourth difference, which is that SiC chips at present are typically smaller than Si chips due to material and process-related yield issues [39].…”