The International Exascale Software Project roadmap

Dongarra, Jack; Beckman, Pete; Moore, Terry; Aerts, Patrick; Aloisio, Giovanni; André, Jean‐Claude; Barkai, D.; Berthou, Jean-Yves; Boku, Taisuke; Braunschweig, Bertrand; Cappello, Franck; Chapman, Barbara; Chi, Xuebin; Choudhary, Alok; Dosanjh, Sudip S.; Dunning, Thom H.; Fiore, Sandro; Geist, Al; Gropp, William; Harrison, Robert J.; Hereld, Mark; Heroux, Michael A.; Hoisie, Adolfy; Hotta, Koh; Zhong, Jun; Ishikawa, Yutaka; Johnson, Fred P.; Kale, Sanjay; Kenway, R.D.; Keyes, David E.; Kramer, Bill; Labarta, Jesús; Lichnewsky, Alain; Lippert, Thomas; Lucas, Bob; Maccabe, A.B.; Matsuoka, Satoshi; Messina, Paul; Michielse, Peter; Mohr, Bernd; Mueller, Matthias; Nagel, Wolfgang E.; Nakashima, Hiroshi; Papka, Michael E.; Reed, D. A.; Sato, Mitsuhisa; Seidel, E.; Shalf, John; Skinner, David; Snir, Marc; Sterling, Thomas; Stevens, Rick; Streitz, Frederick H.; Sugar, Bob; Sumimoto, Shinji; Tang, W. M.; Taylor, John C; Thakur, Rajeev; Trefethen, Anne; Valero, Mateo; Steen, Aad Van Der; Vetter, Jeffrey S.; Williams, Peg; Wisniewski, Robert W.; Yelick, Kathy

doi:10.1177/1094342010391989

Cited by 561 publications

(367 citation statements)

References 2 publications

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“…In this context, it is well known that data movement is becoming more energy hungry than processing data [1]. This implies that data synchronization and communication overheads, experienced by multi-threaded real-world applications, may have an enormous impact on such systems.…”

Section: Introductionmentioning

confidence: 99%

Dataflow Support in x86_64 Multicore Architectures through Small Hardware Extensions

Mondelli

Scionti³

et al. 2015

2015 Euromicro Conference on Digital System Design

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Abstract-The path towards future high performance computers requires architectures able to efficiently run multi-threaded applications. In this context, dataflow-based execution models can improve the performance by limiting the synchronization overhead, thanks to a simple producer-consumer approach. This paper advocates the ISE of standard cores with a small hardware extension for efficiently scheduling the execution of threads on the basis of dataflow principles. A set of dedicated instructions allow the code to interact with the scheduler. Experimental results demonstrate that, the combination of dedicated scheduling units and a dataflow execution model improve the performance when compared with other techniques for code parallelization (e.g., OpenMP, Cilk).

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Section: Introductionmentioning

confidence: 99%

Dataflow Support in x86_64 Multicore Architectures through Small Hardware Extensions

Mondelli

Scionti³

et al. 2015

2015 Euromicro Conference on Digital System Design

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“…Yet, in recent years, the HPC community has acknowledged that the energy efficiency of HPC systems is a major concern in designing future Exascale systems [2,3].…”

Section: Introductionmentioning

confidence: 99%

Assessing Power Monitoring Approaches for Energy and Power Analysis of Computers

Diouri

Dolz

Glück

et al. 2014

Sustainable Computing: Informatics and Systems

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Large-scale distributed systems (e.g., datacenters, HPC systems, clouds, large-scale networks, etc.) consume and will consume enormous amounts of energy. Therefore, accurately monitoring the power dissipation and energy consumption of these systems is more unavoidable. The main novelty of this contribution is the analysis and evaluation of different external and internal power monitoring devices tested using two different computing systems, a server and a desktop machine. Furthermore, we provide experimental results for a variety of benchmarks which intensively exercise the main components (CPU, Memory, HDDs, and NICs) of the target platforms to validate the accuracy of the equipment in terms of power dissipation and energy consumption. On the other hand, we also evaluate three different power measurement interfaces available on current architecture generations. Thanks to the high sampling rate and to the different measured lines, the internal wattmeters allow an improved visualization of some power fluctuations. However, a high sampling rate is not always necessary to understand the evolution of the power consumption during the execution of a benchmark.

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“…The increasing number of nodes in clusters decreases the mean time between failures (MTBF). While the MTBF was in the order of days [2], it will decrease to the order of minutes for exascale systems [3]- [5]. Therefore, HPC programmers must consider that their (long running) jobs will not finish without any hardware or software failure.…”

Section: Introductionmentioning

confidence: 99%