The Low-Loss Spot Size Converter for Alignment with Cleaved Single Mode Fiber

Zhao, Jinyang; Wang, Z.; Ye, Nan; Pang, Fufei; Song, Yingxiong

doi:10.3390/app13148157

Cited by 3 publications

(4 citation statements)

References 24 publications

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“…The design of the SSC has been carried out aiming at simultaneously matching all the requirements of compactness, low insertion loss, broad-band operation as well as ease of manufacture. About this point, all designed features result suitable for the fabrication at the current commercial Siphotonics fab, in contrast to concurrent reverse SSCs reported in the literature [26], which shows tip width less than 100 nm, that can be realized only by using electron-beam lithography or by using expensive ArF immersion lithography. The use of dedicated fabrication processes braked the use of reverse SSCs in commercial PICs.…”

Section: Introductionmentioning

confidence: 88%

Silicon Nitride Spot Size Converter With Very Low-Loss Over the C-Band

Brunetti,

Heuvink,

Schreuder

et al. 2023

IEEE Photon. Technol. Lett.

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Photonic Integrated Circuits (PIC) provide a solution to overcome the main limitations of electronics, such as the operating frequency and heat generation, pushing the socalled "More than Moore" concept to increase the capacity and the speed of data transmission. In large data centers and optical transmission systems, PICs are interconnected by using fiber-tochip couplers, which are crucial to improve system performance. An ultra-low loss interconnection (< 1 dB) over a wide bandwidth (≈ 50 nm) is the gold standard. In this context, the silicon nitride (Si3N4) platform is a promising candidate, with propagation losses of the order of dB/m at 1550 nm. Here, we propose the design and the experimental results for a silicon nitride-based fiber-to-chip interconnect, acting as a high aspect ratio waveguide Spot-Size Converter (SSC). A coupling loss less than 0.20 dB over the entire C-band and within a footprint of 1,800 µm 2 has been experimentally demonstrated, suggesting the proposed interconnect as a promising solution for nextgeneration high-density PICs.

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Section: Introductionmentioning

confidence: 88%

Silicon Nitride Spot Size Converter With Very Low-Loss Over the C-Band

Brunetti,

Heuvink,

Schreuder

et al. 2023

IEEE Photon. Technol. Lett.

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“…The GRIN waveguide can compress the MFD of the light spot from 8 μm to 5~6 μm, and the 3D tapered waveguide can guide the light into the Single-Mode Si Waveguide on the SOI platform. Comparing with the previous SSC proposed by our team [13] , this SSC has a single-refractive-index cladding structure, which is easier to be fabricated. In this case, the thickness of the taper tip has been optimized with a fixed width of 200 nm.…”

Section: Structure and Designmentioning

confidence: 98%

“…The refractive index distribution on the Y-axis and Z-axis is Gaussian after each ion injection, so the distribution on the Y-axis is easy to realize. The refractive index distribution on the Z-axis can be realized by multiple ion implantations [13] . Figure 3 shows the refractive index and vacancy distribution of SiO2 waveguide after multiple N + implantations simulated by TRIM software.…”

Section: Structure and Designmentioning

confidence: 99%

Low-loss spot size converter based on the integration of graded-index waveguide and 3D tapered waveguide

Wang,

Chen,

et al. 2024

Advanced Fiber Laser Conference (AFL2023)

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A low-loss spot size converter (SSC) on the SOI platform has been proposed consisting of a graded-index(GRIN) waveguide build by the ion implantation process and a 3D tapered waveguide for optical coupling between the singlemode fiber and the silicon waveguide. When the refractive index of SiO2 is set as 1.44~1.458, the coupling losses can be confined within 0.3~0.6 dB in the wavelength range of 1.5~1.6 μm. As the refractive index of SiO2 varies with wavelength, device exhibits different performances as the cladding size changes. When the upper cladding size is 6μm × 8μm, the polarization-dependent loss of the SSC is less than 0.21 dB in the wavelength range of 1500~1600nm. The TE mode coupling loss is the lowest when the upper cladding size is 5.5μm × 11μm, and the coupling loss of TE mode is between 0.25dB ~ 0.34 dB in the wavelength range of 1.5-1.6 μm. The TM mode coupling loss is the lowest when the upper cladding size is 6μm×9μm, and the coupling loss of TE mode is between 0.17 ~ 0.48 dB in the wavelength range of 1.5-1.6 μm. In addition, the refractive indexes of both top and bottom oxide are at the same value and the starting taper tip width can be maintained as 200 nm suitable for the lithography resolution of the current commercial silicon photonics fabs.

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“…Despite facing challenges such as losing Y symmetry and encountering fabrication issues, these tapers show low coupling losses. Zhao et al [59] proposed a design for a spot size converter that integrates an ion-implanted graded index waveguide (GRIN) with a 2D inversely tapered waveguide. This design aims to facilitate the efficient coupling of light between a cleaved single-mode fiber and a silicon waveguide.…”

Section: Vertical Multi-layer Edge Couplersmentioning

confidence: 99%

Integrated Photonic Passive Building Blocks on Silicon-on-Insulator Platform

Amanti,

Andrini,

Armani

et al. 2024

Photonics

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Integrated photonics on Silicon-On-Insulator (SOI) substrates is a well developed research field that has already significantly impacted various fields, such as quantum computing, micro sensing devices, biosensing, and high-rate communications. Although quite complex circuits can be made with such technology, everything is based on a few ’building blocks’ which are then combined to form more complex circuits. This review article provides a detailed examination of the state of the art of integrated photonic building blocks focusing on passive elements, covering fundamental principles and design methodologies. Key components discussed include waveguides, fiber-to-chip couplers, edges and gratings, phase shifters, splitters and switches (including y-branch, MMI, and directional couplers), as well as subwavelength grating structures and ring resonators. Additionally, this review addresses challenges and future prospects in advancing integrated photonic circuits on SOI platforms, focusing on scalability, power efficiency, and fabrication issues. The objective of this review is to equip researchers and engineers in the field with a comprehensive understanding of the current landscape and future trajectories of integrated photonic components on SOI substrates with a 220 nm thick device layer of intrinsic silicon.

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The Low-Loss Spot Size Converter for Alignment with Cleaved Single Mode Fiber

Cited by 3 publications

References 24 publications

Silicon Nitride Spot Size Converter With Very Low-Loss Over the C-Band

Silicon Nitride Spot Size Converter With Very Low-Loss Over the C-Band

Low-loss spot size converter based on the integration of graded-index waveguide and 3D tapered waveguide

Integrated Photonic Passive Building Blocks on Silicon-on-Insulator Platform

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