The &lt;formula formulatype="inline"&gt;&lt;tex Notation="TeX"&gt;$\hbox{1}/f$&lt;/tex&gt;&lt;/formula&gt; Noise and Random Telegraph Noise Characteristics in Floating-Gate &lt;emphasis emphasistype="smcaps"&gt;nand&lt;/emphasis&gt; Flash Memories

Bae, Sung‐Ho; Lee, Jeong‐Hyun; Kwon, Hyuck‐In; Ahn, Jung-Ryul; Om, Jae-Chul; Park, Chan Hyeong; Lee, Jong-Ho

doi:10.1109/ted.2009.2022700

Cited by 23 publications

(3 citation statements)

References 15 publications

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“…Recently, RTS has had negative effects on read/write operations of flash memory, which is a major driver of device shrinkage. [12][13][14][15][16][17] The image quality of a complementary MOS (CMOS) image sensor is also degraded seriously by RTS occurring at pixel source follower amplifiers. [18][19][20] Because the variation in static threshold voltage (V th ) within a die grows with the continuous scaling down of devices, [21][22][23] an anomalously large V th instability resulting from a superimposed RTS has become a big problem especially in the stable operation of static random access memory (SRAM).…”

Section: Introductionmentioning

confidence: 99%

Experimental Investigation of Effect of Channel Doping Concentration on Random Telegraph Signal Noise

Abe¹,

Teramoto

Watabe³

et al. 2010

Jpn. J. Appl. Phys.

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Four groups of grain sizes of LiF:Mg,Cu,P material were chosen for the experiment. The influences of the grain size on the photon energy response and dose response have been examined in the intewal of 28-1250 keV and the dose range 0.190 Gy of ' %o y-rays. The experimental results show that both the energy response and the dose response are grain size dependent. A possible correlation seems to exist between the energy response v(E) and the dose response f ( D ) . A brief discussion is provided.

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Section: Introductionmentioning

confidence: 99%

Experimental Investigation of Effect of Channel Doping Concentration on Random Telegraph Signal Noise

Abe¹,

Teramoto

Watabe³

et al. 2010

Jpn. J. Appl. Phys.

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“…In order to evaluate the interface characteristic or tunneling oxide quality, flicker noise analysis is carried out [10]. As shown in Table 1, the three devices have similar SS values, and this means that interface comparison is difficult by SS value.…”

Section: Resultsmentioning

confidence: 99%

Pillar Type Silicon-Oxide-Nitride-Oxide-Silicon Flash Memory Cells with Modulated Tunneling Oxide

Lee¹,

Seung-Dong²,

Yun³

et al. 2013

Transactions on Electrical and Electronic Materials

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In this paper, we fabricated 3D pillar type silicon-oxide-nitride-oxide-silicon (SONOS) devices for high density flash applications. To solve the limitation between erase speed and data retention of the conventional SONOS devices, bandgap-engineered (BE) tunneling oxide of oxide-nitride-oxide configuration is integrated with the 3D structure. In addition, the tunneling oxide is modulated by another method of N 2 ion implantation (N 2 I/I). The measured data shows that the BE-SONOS device has better electrical characteristics, such as a lower threshold voltage (V T ) of 0.13 V, and a higher g m.max of 18.6 μA/V and mobility of 27.02 cm 2 /Vs than the conventional and N 2 I/I SONOS devices. Memory characteristics show that the modulated tunneling oxide devices have fast erase speed. Among the devices, the BE-SONOS device has faster program/erase (P/E) speed, and more stable endurance characteristics, than conventional and N 2 I/I devices. From the flicker noise analysis, however, the BE-SONOS device seems to have more interface traps between the tunneling oxide and silicon substrate, which should be considered in designing the process conditions. Finally, 3D structures, such as the pillar type BE-SONOS device, are more suitable for next generation memory devices than other modulated tunneling oxide devices.

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“…[1,[3][4][5][6][7] The research results illustrate that both the channel dopant fluctuation and the trap generation in the tunnel oxide layer aggravate the RTN impact on the cell's threshold voltage control. [8][9][10][11][12][13][14][15][16][17][18][19] On the other hand, RTN is a conspicuous issue for multi-level flash memory due to the stringent requirement of V th distribution since multi-level cell program levels are closer to each other. Small RTN fluctuations could confuse the adjacent levels and lead to the errors of read operation.…”

Section: Introductionmentioning

confidence: 99%

Random telegraph noise on the threshold voltage of multi-level flash memory

Liao

et al. 2017

Chinese Phys. B

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We investigate the impact of random telegraph noise (RTN) on the threshold voltage of multi-level NOR flash memory. It is found that the threshold voltage variation (∆V th ) and the distribution due to RTN increase with the programmed level (V th ) of flash cells. The gate voltage dependence of RTN amplitude and the variability of RTN time constants suggest that the large RTN amplitude and distribution at the high program level is attributed to the charge trapping in the tunneling oxide layer induced by the high programming voltages. A three-dimensional TCAD simulation based on a percolation path model further reveals the contribution of those trapped charges to the threshold voltage variation and distribution in flash memory.

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The <formula formulatype="inline"><tex Notation="TeX">$\hbox{1}/f$</tex></formula> Noise and Random Telegraph Noise Characteristics in Floating-Gate <emphasis emphasistype="smcaps">nand</emphasis> Flash Memories

Cited by 23 publications

References 15 publications

Experimental Investigation of Effect of Channel Doping Concentration on Random Telegraph Signal Noise

Experimental Investigation of Effect of Channel Doping Concentration on Random Telegraph Signal Noise

Pillar Type Silicon-Oxide-Nitride-Oxide-Silicon Flash Memory Cells with Modulated Tunneling Oxide

Random telegraph noise on the threshold voltage of multi-level flash memory

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