During the last decade, Si/Si 1−x Ge x heterostructures have emerged as a viable system for use in CMOS technology with the recent industrial production of heterojunction bipolar transistor-based integrated circuits. However, many key problems have to be solved to further expand the capabilities of this system to other more attractive devices. This paper gives a comprehensive review of the progress achieved during the last few years in the understanding of some fundamental growth mechanisms. The discrepancies between classical theories (in the framework of continuum elasticity) and experimental results are also specially addressed. In particular, the major role played by kinetics in the morphological evolution of layers is particularly emphasized. Starting from the unexpected differences in Si 1−x Ge x morphological evolution when deposited on (001) and on (111), our review then focuses on: (1) the strain control and adjustment (from fully strained to fully relaxed 2D and 3D nanostructures)in particular, some original examples of local CBED stress measurements are presented; (2) the nucleation, growth, and self-assembly processes, using self-patterned template layers and surfactant-mediated growth; (3) the doping processes (using B for type p and Sb for type n) and the limitations induced by dopant redistribution during and after growth due to diffusion, segregation, and desorption. The final section will briefly address some relevant optical properties of Si 1−x Ge x strained layers using special growth processes.(Some figures in this article are in colour only in the electronic version) (HBT). The main reason is that it presents a minimum additional cost to CMOS and a very simple design with a narrow Si 1−x Ge x base layer inserted into a bipolar BiCMOS fabrication process. However, even if this technology is quite mature, the device characteristics obtained in production lines are much less good than those demonstrated for research devices. This result has not been explained so far, but the high thermal budget, used in present CMOS production, is assumed to have the major detrimental effect. Indeed, it causes strain relaxation (by dislocation nucleation and also by interdiffusion of Si/Si 1−x Ge x ), dopant diffusion, interface roughening, and Ge clustering. All these phenomena are well known to degrade the electrical properties of HBTs.Recent research developments also focus on other attractive devices such as the p-type Si 1−x Ge x MOSFET, since p channels represent so far the major limiting factor in CMOS performance. Indeed, the mobility of Si 1−x Ge x p MOSFET is only 20% larger than those of conventional transistors. This is attributed to parallel conduction due to the small band offset of Si 1−x Ge x channels that contain low Ge content. Further improvements would then rely on an increase of the Ge content to increase the band offset. This is expected to give stronger transfer and confinement of the carriers, preventing parallel conduction from taking place. However, this faces serious problems, since a...