The Paradigm Shift in Understanding the Bias Temperature Instability: From Reaction–Diffusion to Switching Oxide Traps

Grasser, T.; Kaczer, B.; Goes, Wolfgang; Reisinger, H.; Aichinger, Thomas; Hehenberger, Ph.; Wagner, P.-J.; Schanovsky, F.; Franco, J.; Luque, María Toledano; Nelhiebel, Michael

doi:10.1109/ted.2011.2164543

Cited by 428 publications

(242 citation statements)

References 72 publications

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“…As such, in order to remove this uncertainty, we propose to check for a frequency dependent contribution to BTI with a deliberately large delay at the merging point t M . This would also be favorable from the perspective of reaction-diffusionbased theories which claim that the frequency-dependent holetrapping component vanishes after a few seconds, leaving behind the frequency-independent RD contribution [8,35].…”

Section: Frequency Dependencementioning

confidence: 99%

“…While all studies report a duty-factor dependence following the ubiquitous step-shaped curve [1,2,[5][6][7][8], the frequency dependence of BTI appears to be controversial: particularly older studies using slow measurements report frequency independent behavior [1,9,10], while more recent studies have revealed a frequency dependent contribution [3,[11][12][13][14][15][16][17][18][19][20]. We study the duty-factor and frequency dependence in the light of the recently proposed capture/emission time (CET) map model [7,[21][22][23] and demonstrate that the recoverable component of BTI can only to the first-order be captured by a two-state defect model.…”

Section: Introductionmentioning

confidence: 99%

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On the frequency dependence of the bias temperature instability

Kaczer

Reisinger

Wagner

et al. 2012

2012 IEEE International Reliability Physics Symposium (IRPS)

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Abstract-An accurate understanding of the duty-factor and frequency dependence of the bias temperature instability (BTI) is essential since it can transfer to significant lifetime benefits. Contradictory reports regarding the frequency dependence have been published in literature, with particularly older studies and those interpreted in the framework of the reaction-diffusion model claiming BTI to be frequency-independent. Newer studies, on the other hand, clearly show a frequency-dependent component of BTI. Here we discuss this frequency dependence using the recently suggested capture/emission time map model, which explains BTI as a collection of a large number of independent first-order reactions of defects with two states. While this model can explain most features observed in DC and low-frequency AC stress experiments, it does not fully capture the experimentally observed frequency and duty-factor dependence. However, when a more accurate defect model is considered, which describes charging of the defect via an intermediate state, good accuracy with experimental data is obtained.

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Section: Frequency Dependencementioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

On the frequency dependence of the bias temperature instability

Kaczer

Reisinger

Wagner

et al. 2012

2012 IEEE International Reliability Physics Symposium (IRPS)

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“…The original approach in [122] relied on the classical theory of direct tunneling into oxide defects [80,81], explicitly linking τ c and τ e to the space and energy position of the trap inside the oxide. Later results have, however, shown that capture/emission times in MOSFETs are not compatible with such a description [143,144], due to device variability effects on the time constants [145][146][147] and structural relaxation of defects [140,148], generating a large spread in time constants even for traps located close to the silicon/oxide interface and disrupting the classical correlation between τ c and τ e . The study of the microscopic properties of RTN traps is still an active research topic [149][150][151][152][153][154][155][156], but for our purposes we will adopt a pragmatic approach, assuming given distributions of capture/emission time constants that may be consistent with observations, without linking them to any particular trap location.…”

Section: Modelsmentioning

confidence: 99%

Reliability of NAND Flash Memories: Planar Cells and Emerging Issues in 3D Devices

2017

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Abstract:We review the state-of-the-art in the understanding of planar NAND Flash memory reliability and discuss how the recent move to three-dimensional (3D) devices has affected this field. Particular emphasis is placed on mechanisms developing along the lifetime of the memory array, as opposed to time-zero or technological issues, and the viewpoint is focused on the understanding of the root causes. The impressive amount of published work demonstrates that Flash reliability is a complex yet well-understood field, where nonetheless tighter and tighter constraints are set by device scaling. Three-dimensional NAND have offset the traditional scaling scenario, leading to an improvement in performance and reliability while raising new issues to be dealt with, determined by the newer and more complex cell and array architectures as well as operation modes. A thorough understanding of the complex phenomena involved in the operation and reliability of NAND cells remains vital for the development of future technology nodes.

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“…However, assuming a DC BTI stress may be too pessimistic: a typical CMOS circuit usually switches during operation, and exhibits an AC BTI stress (i.e., transistors experience alternate BTI stress and recovery phrases). The measurement results in [6] and [7] show that the amount of BTI degradation is not sensitive to stress duty cycle (i.e., the ratio of total stress time to total operating time) when the duty cycle ranges from 20% to 80%. This means that we can approximate the BTI degradation in a typical CMOS circuit by assuming an AC BTI stress with 50% duty cycle.…”

Section: B Worst-case Bti Degradationmentioning

confidence: 99%

Impact of Adaptive Voltage Scaling on Aging-Aware Signoff

Chan¹,

Chan²,

Kahng³

2013

Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE), 2013

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Abstract-Transistor aging due to bias temperature instability (BTI) is a major reliability concern in sub-32nm technology. Aging decreases performance of digital circuits over the entire IC lifetime. To compensate for aging, designs now typically apply adaptive voltage scaling (AVS) to mitigate performance degradation by elevating supply voltage. Varying the supply voltage of a circuit using AVS also causes the BTI degradation to vary over lifetime. This presents a new challenge for margin reduction in conventional signoff methodology, which characterizes timing libraries based on transistor models with pre-calculated BTI degradations for a given IC lifetime. Many works have separately addressed predictive models of BTI and the analysis of AVS, but there is no published work that considers BTI-aware signoff that accounts for the use of AVS during IC lifetime. This motivates us to study how the presence of AVS should affect aging-aware signoff. In this paper, we first simulate and analyze circuit performance degradation due to BTI in the presence of AVS. Based on our observations, we propose a ruleof-thumb for chip designers to characterize an aging-derated standardcell timing library that accounts for the impact of AVS. According to our experimental results, this aging-aware signoff approach avoids both overestimation and underestimation of aging -either of which results in power or area penalty -in AVS enabled systems.

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The Paradigm Shift in Understanding the Bias Temperature Instability: From Reaction–Diffusion to Switching Oxide Traps

Cited by 428 publications

References 72 publications

On the frequency dependence of the bias temperature instability

On the frequency dependence of the bias temperature instability

Reliability of NAND Flash Memories: Planar Cells and Emerging Issues in 3D Devices

Impact of Adaptive Voltage Scaling on Aging-Aware Signoff

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