Four black-box fault models are introduced in the paper. The test generation task for the black-box model is more complicated, because possible realizations of the design must be taken into account. However, the time required to generate tests is not very critical factor, because the test generation can be done in parallel with the circuit synthesis process without a prolongation of Time-to-Market. All the proposed fault models were analyzed and investigated experimentally. On the basis of these results, an appropriate fault model responding to the complexity of the problem being solved can be selected.