The role of parasitic inductance in high-power planar transformer design and converter integration

Ferrell, J.; Lai, Jih-Sheng; Nergaard, T.; Huang, Xuejue; Zhu, Lin; Davis, R.

doi:10.1109/apec.2004.1295855

Cited by 23 publications

(9 citation statements)

References 7 publications

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“…The formula (see eqn.6) was published in the previous reference [3][4][5] to compute the leakage inductance for the symmetrical interleaving structure, which has been generally used to compute leakage inductance for most of designers.…”

Section: The Error Analysismentioning

confidence: 99%

“…The section also analyzes the magnetic field strength in each layer and finite element analysis 2D model is simulated to demonstrate the correctness of the analytical method. As presented in previous publications [3][4][5], the formula (see eqn.6) is generally used to calculate the leakage inductance. However, it must be noted that the formula doesn't provide precise results.…”

Section: Introductionmentioning

confidence: 99%

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The analysis and comparison of leakage inductance in different winding arrangements for planar transformer

Ouyang

Thomsen

Andersen

2009

2009 International Conference on Power Electronics and Drive Systems (PEDS)

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--The coupling of the windings can be easily increased by using multiply stacked planar windings connection. Interleaving is a well-known technique used to reduce leakage inductance and minimize high-frequency winding losses. The paper aims to analyze leakage inductance based on magneto motive force (MMF) and energy distribution in planar transformer and correct the formula of leakage inductance proposed by previous publications. The investigation of different winding arrangements shows significant advantages of interleaving structure. In this work, a novel half turn structure is proposed to reduce leakage inductance further. Some important issues are presented to acquire desired leakage inductance. The design and modeling of 1 kW planar transformer is presented. In order to verify the analytical method for leakage inductance in this paper, finite element analysis (FEA) and measurement with impedance analyzer are presented. Good matching between calculation, FEA 2D simulation and measurement results is achieved.Index Terms--leakage inductance, magneto motive force (MMF), finite element analysis (FEA), interleaving, half turn, planar transformer

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Section: The Error Analysismentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

The analysis and comparison of leakage inductance in different winding arrangements for planar transformer

Ouyang

Thomsen

Andersen

2009

2009 International Conference on Power Electronics and Drive Systems (PEDS)

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“…Most of applications require low values of leakage inductances because they can induce supplementary losses, stress on active components as well as electromagnetic interference (EMI) due to high frequency voltage oscillations [38] [54]. For some applications [67], an important leakage inductance value is useful as in TAB converter in ZVS conditions.…”

Section: Leakage Inductancementioning

confidence: 99%

Planar Magnetic Components in More Electric Aircraft: Review of Technology and Key Parameters for DC–DC Power Electronic Converter

Magambo

Bakri

Margueron

et al. 2017

IEEE Trans. Transp. Electrific.

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The More Electric Aircraft (MEA) has motivated aircraft manufacturers since few decades. Indeed, their investigations lead to the increase of electric power in airplanes. The challenge is to decrease the weight of embedded systems and therefore the fuel consumption. This is possible thanks to new efficient power electronic converters made of new components. As magnetic components represent a great proportion of their weight, planar components are an interesting solution to increase the power density of some switching mode power supplies. This paper presents the benefits and drawbacks of high frequency planar transformers in DC/DC converter, different models developed for their design and different issues in MEA context related to planar's specific geometry and technology.

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“…In the experiment, the DC inductor is designed as L dc = 15L s = 7.5uH, so the phase current ripple ΔI dc is as large as 2I dc at rated power, and at the same time ZVS can be guaranteed. Thanks to the three-phase interleaved converter, the current ripples can be alleviated significantly [7]. The total current ripple is given as: Fig.…”

Section: B DC Inductor Designmentioning

confidence: 99%

Unified modulation for three-phase current-fed bidirectional dc-dc converter under varied input voltage

Wang

2010

2010 Twenty-Fifth Annual IEEE Applied Power Electronics Conference and Exposition (APEC)

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In this paper, a new three-phase current-fed bidirectional dc-dc converter is proposed. The topology integrates a three-phase boost converter with a three-phase galvanically isolated bidirectional dc-dc converter. Keeping dc bus voltage constant allows high efficient energy conversion over a wide input voltage and maintains ZVS conditions in the whole operation range. By using compact small inductance dc inductors the ZVS conditions can be improved in low power range and the switching losses of the lower switches are reduced. At the same time the input current ripple can be alleviated by three-phase interleaved structure. Finally, a 6-kW hardware prototype is constructed and tested. The experimental results verify it can maintain high efficiency over wide input voltage and power range. I.978-1-4244-4783-1/10/$25.00 ©2010 IEEE

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The role of parasitic inductance in high-power planar transformer design and converter integration

Cited by 23 publications

References 7 publications

The analysis and comparison of leakage inductance in different winding arrangements for planar transformer

The analysis and comparison of leakage inductance in different winding arrangements for planar transformer

Planar Magnetic Components in More Electric Aircraft: Review of Technology and Key Parameters for DC–DC Power Electronic Converter

Unified modulation for three-phase current-fed bidirectional dc-dc converter under varied input voltage

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