The Trend of 2D Transistors toward Integrated Circuits: Scaling Down and New Mechanisms

Abstract

2D transition metal chalcogenide (TMDC) materials, such as MoS2, have recently attracted considerable research interest in the context of their use in ultrascaled devices owing to their excellent electronic properties. Microprocessors and neural network circuits based on MoS2 have been developed at a large scale but still do not have an advantage over silicon in terms of their integrated density. In this study, the current structures, contact engineering, and doping methods for 2D TMDC materials for the scaling‐down process and performance optimization are reviewed. Devices are introduced according to a new mechanism to provide the comprehensive prospects for the use of MoS2 beyond the traditional complementary–metal–oxide semiconductor in order to summarize obstacles to the goal of developing high‐density and low‐power integrated circuits (ICs). Finally, prospects for the use of MoS2 in large‐scale ICs from the perspectives of the material, system performance, and application to nonlogic functionalities such as sensor circuits and analogous circuits, are briefly analyzed. The latter issue is along the direction of “more than Moore” research.

Two dimensional semiconducting materials for ultimately scaled transistors

“…All these strategies address the contact issue to some certain extent, making semiconducting TMDs viable candidates for FETs with proper functionalities. During the submission of this article, we become aware of a review about the structural properties, doping, contact engineering of 2D semiconductors (mainly TMDs), which also provided detailed discussions on the advanced devices beyond CMOS technology ( Shen et al., 2022 ). These contents are equally important for the ultimate device scaling and performance optimization, and we refer to interested readers to this review.…”

Application of 2D Materials in Hardware Security for Internet‐of‐Things: Progress and Perspective

“…The broad library of 2D semiconductors features a dangling-bond-free surface, excellent electronic performance at subnanometer thickness, myriad properties of materials, and compatibility with new manufacturing techniques, [6] and hence 2D materials are promising to alleviate the challenges of integrated circuits and computing technologies based on silicon technology. [7,8,[12][13][14] In the application of hardware security, 2D materials exhibit tremendous variation ascribing to variation in different intrinsic and extrinsic parameters arising from random defects in the synthesis of materials, material transfer, and device fabrication, giving rise to much more complexed cycle-to-cycle (C2C) or device-to-device (D2D) variation than other materials as listed in Table S1, Supporting Information. [10,[15][16][17][18][19] Therefore, 2D material-based security devices can have multiple high-quality entropy sources without increasing energy consumption and hardware overhead to compensate for low randomness as in the case of silicon-based hardware security.…”

Dual-Gate All-Electrical Valleytronic Transistors

“…The switching slope of this device is 166 mV/decade, which can be further optimized through device interface and dielectric engineering. In principle, the realistic device performance of this MoS 2 valleytronic transistor should be able to fulfill the requirement of practical IC applications. , …”

“…In principle, the realistic device performance of this MoS 2 valleytronic transistor should be able to fulfill the requirement of practical IC applications. 33,34 In Figure 3e, the exponential drop of V NL , corresponding to the partial gate generation of an energy barrier on MoS 2 conduction impeding the transverse transport of the valley polarized carriers, starts from −2 V of partial gate voltage. However, the exponential drop of charge current in Figure 2e, corresponding to the partial gate generation of the energy barrier for charge carriers, starts from −4.5 V of partial gate voltage.…”