Theoretical Investigation of the Performance Improvement in GeSn/SiGeSn hetero Line Tunneling FET (HL-TFET)

Wang, H.; Han, Guang-Rong; Liu, Y.; Zhang, C.; Zhang, J.; Hao, Yue

doi:10.7567/ssdm.2017.ps-3-11

Extended Abstracts of the 2017 International Conference on Solid State Devices and Materials 2017

DOI: 10.7567/ssdm.2017.ps-3-11

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Theoretical Investigation of the Performance Improvement in GeSn/SiGeSn hetero Line Tunneling FET (HL-TFET)

H. Wang¹,

Guang-Rong Han²,

Y. Liu³

et al.

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Theoretical Investigation of the Performance Improvement in GeSn/SiGeSn hetero Line Tunneling FET (HL-TFET)

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