Thermal aware automated load balancing for HPC applications

Menon, Harshitha; Acun, Bilge; Gonzalo, Simon Garcia de; Sarood, Osman; Kalé, Laxmikant V.

doi:10.1109/cluster.2013.6702627

Cited by 19 publications

(9 citation statements)

References 11 publications

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“…To support tasks, we created a task queue [13] on each PE, which is distinct from the normal message queue. The messages in the message queue are meant for that specific PE, whereas the tasks in the task queue can be stolen by different cores on a node.…”

Section: Task Queuementioning

confidence: 99%

Integrating OpenMP into the Charm++ Programming Model

Bak

Menon

White

et al. 2017

Proceedings of the Third International Workshop on Extreme Scale Programming Models and Middleware

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The recent trend of rapid increase in the number of cores per chip has resulted in vast amounts of on-node parallelism. These high core counts result in hardware variability that introduces imbalance. Applications are also becoming more complex themselves, resulting in dynamic load imbalance. Load imbalance of any kind can result in loss of performance and decrease in system utilization. In this paper, we propose a new integrated runtime system that adds OpenMP shared-memory parallelism to the Charm++ distributed programming model to improve load balancing on distributed systems. Our proposal utilizes an infrequent periodic assignment of work to cores based on load measurement, in combination with tasks created via OpenMP's parallel loop construct from each core to handle load imbalance. We demonstrate the benefits of using this integrated runtime system on the LLNL ASC proxy application Lassen, achieving speedups of 50% over runs without any load balancing and 10% over existing distributed-memory-only balancing schemes in Charm++. CCS CONCEPTS • Computer systems organization → Multicore architectures; Distributed architectures; • Software and its engineering → Runtime environments;

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Section: Task Queuementioning

confidence: 99%

Integrating OpenMP into the Charm++ Programming Model

Bak

Menon

White

et al. 2017

Proceedings of the Third International Workshop on Extreme Scale Programming Models and Middleware

Self Cite

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“…This can introduce significant amount of load imbalance in a tightly coupled application. To mitigate the load imbalance, the RTS monitors the application characteristics and whenever it detects load imbalance, it triggers a call to the load balancer [10].…”

Section: Power Awarenessmentioning

confidence: 99%

Parallel Programming with Migratable Objects: Charm++ in Practice

Acun

Gupta

Jain

et al. 2014

SC14: International Conference for High Performance Computing, Networking, Storage and Analysis

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126

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The advent of petascale computing has introduced new challenges (e.g. heterogeneity, system failure) for programming scalable parallel applications. Increased complexity and dynamism in science and engineering applications of today have further exacerbated the situation. Addressing these challenges requires more emphasis on concepts that were previously of secondary importance, including migratability, adaptivity, and runtime system introspection. In this paper, we leverage our experience with these concepts to demonstrate their applicability and efficacy for real world applications. Using the CHARM++ parallel programming framework, we present details on how these concepts can lead to development of applications that scale irrespective of the rough landscape of supercomputing technology. Empirical evaluation presented in this paper spans many miniapplications and real applications executed on modern supercomputers including Blue Gene/Q, Cray XE6, and Stampede.

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“…Indeed, Distem is able to emulate DVFS at core level. A similar experiment using DVFS is presented in [13]. However, it could not be performed at the core level since DVFS was only available at the socket level.…”

Section: Related Workmentioning

confidence: 99%

Distem: Evaluation of Fault Tolerance and Load Balancing Strategies in Real HPC Runtimes through Emulation

Ruiz

Emeras

Jeanvoine

et al. 2016

2016 16th IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing (CCGrid)

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Abstract-The era of Exascale computing raises new challenges for HPC. Intrinsic characteristics of those extreme scale platforms bring energy and reliability issues. To cope with those constraints, applications will have to be more flexible in order to deal with platform geometry evolutions and unavoidable failures. Thus, to prepare for this upcoming era, a strong effort must be made on improving the HPC software stack. This work focuses on improving the study of a central part of the software stack, the HPC runtimes. To this end we propose a set of extensions to the Distem emulator that enable the evaluation of fault tolerance and load balancing mechanisms in such runtimes. Extensive experimentation showing the benefits of our approach has been performed with three HPC runtimes: Charm++, MPICH, and OpenMPI.

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Thermal aware automated load balancing for HPC applications

Cited by 19 publications

References 11 publications

Integrating OpenMP into the Charm++ Programming Model

Integrating OpenMP into the Charm++ Programming Model

Parallel Programming with Migratable Objects: Charm++ in Practice

Distem: Evaluation of Fault Tolerance and Load Balancing Strategies in Real HPC Runtimes through Emulation

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