2017
DOI: 10.1016/j.vlsi.2017.03.001
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Thermal aware design and comparative analysis of a high performance 64-bit adder in FD-SOI and bulk CMOS technologies

Abstract: A B S T R A C TThermal behaviours of high-performance digital circuits in bulk CMOS and FDSOI technologies are compared on a 64-bit Kogge-Stone adder designed in 40 nm node. Temperature profiles of the adder in bulk and FDSOI are extracted with thermal simulations and hotspot locations are studied. The influence of local power density on peak temperature is examined. It is shown that high power density devices have significant influence on peak temperature in FDSOI. It is found that some group of devices that … Show more

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“…However, existing tools are impractical for post-Automatic Place and Route (APR) thermal simulations. Considering the role of temperature in the reliability and aging mechanisms of circuits, post-APR simulations are especially important [12,13,14].…”
Section: Introductionmentioning
confidence: 99%
“…However, existing tools are impractical for post-Automatic Place and Route (APR) thermal simulations. Considering the role of temperature in the reliability and aging mechanisms of circuits, post-APR simulations are especially important [12,13,14].…”
Section: Introductionmentioning
confidence: 99%