Abstract:Due to the tier architecture <span lang="EN-US">of 3D network-on-chip (3D-NoC), reducing the thermal hotspot within the chip is challenging as a cooling mechanism that lies merely on the single side of a chip. High power density in 3D NoC is responsible for reliability degradation and thermal difficulties. Thermal-aware routing becomes substantial to handle thermal difficulties and diffusion of heat to the cooler regions. Thermal-aware routing focuses on bypassing hotspot areas by selecting cooler areas.… Show more
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