Thermal-aware sampling in architectural simulation

Abstract

Thermal behavior of modern processors is a first-order design constraint. However, accurate estimation of thermal behavior is time consuming, and techniques for accelerating performance simulations often yield inaccurate results when directly applied to thermal simulation, or do not reduce the thermal computation at all. This paper is the first to propose thermal sampling techniques. It can be integrated with existing phase-based and statistical-based architectural simulator sampling. The resulting simulator can perform accurate performance, power, and thermal characterization at close to 30 MIPS, on average, instead of 5 MIPS for the fastest sampling technique without thermal-aware sampling.

ESESC: A fast multicore simulator using Time-Based Sampling

“…Coskun et al [10] use SimPoint to sample performance and power phases, and reuse them to reconstruct the whole power trace on which thermal computation is performed. Ardestani et al [4] extend the sampling to the thermal domain by reconstructing a power-time trace as the simulation progresses. To the best of our knowledge, TBS is the first to enable thermal evaluation for statistically sampled simulation of shared memory systems running multithreaded applications.…”

“…See Table 6). We use the same reconstruction proposed by [4] for single core configurations. In some ap- plications, the threads are almost identical; perform around the same amount of work without contention over the shared resources; and use barriers to synchronize.…”

“…Other subintervals, however, by design do not perform detailed timing modeling nor do they maintain the statistics. For such cases, we predict the IPC to figure out the number of instructions to be executed (as an example of related work predicting IPC see [4]). …”

“…Sampling introduces complexity in temperature simulation due to the collapse of progressed time. Ardestani et al [4] propose a reconstruction-based method to model temperature in a sampled simulation. However, as we discussed in Section 3.1, the progressed time of the threads diverges in a sampled multicore simulation.…”

“…However, realtime interference of temperature and performance would be compromised. As a result, IBS methods, including [4], fail to simulate the progress of temperature in a multicore configuration.…”