Thermal performance evaluation of cascode Paralleled-GaN-HEMTs packaging for high power switching applications

A New GaN-Based Device, P-Cascode GaN HEMT, and Its Synchronous Buck Converter Circuit Realization

“…A cascode configuration that comprises a high-voltage, normally-on GaN HEMTs device and a low-voltage silicon NMOS is shown in Figure 6 [16][17][18][19][20][21][22]. The cascode GaN HEMT is using the NMOS as a switch to turn on and off the powe path from drain to source when vDS is forward biased.…”

“…A popular means of satisfying the normally-off requirement is to use a cascode configuration that comprises a high-voltage, normally-on GaN HEMTs device and a low-voltage silicon NMOS, as shown in Figure 6. In order to control the ON/OFF state of the normally-on GaN switch behaving as a normally-off device that is compatible with the commercial gate driver, a cascoding 80 mm D-mode GaN device, SiC SBD, and a low-voltage NMOS was achieved in NCTU [16][17][18][19][20][21][22].…”

“…The novel P-Cascode GaN device is implemented by using discrete TO-220 package D-mode MIS-HEMT GaN and TO-220 package P-MOSFET. Comparing to the previous achievements in NCTU [16][17][18][19][20][21][22], which needed two E-mode cascode GaN HEMT devices to achieve the synchronous bulk operations, we need only one P-Cascode GaN device to implement the same operations. The aim of this paper is to reduce the shooting through problems inherent in the synchronous buck converter.…”

“…Cascode configuration provides a positive V th to control the GaN HEMT, but it is still limited by the package parasitic capacitance [15]. There is big appreciation of the development teams of previous work on NCTU GaN HEMT devices, covering every aspect of materials, process development, devices [16][17][18], thermal performance [19,20], and the spice model [21,22], leading to the lab-made cascode GaN HEMT, equipped to potentially be capable of being realized in circuit applications. However, the cascode topology faces two problems which includes the switching frequency limited by the NMOS switch, and the returning current flow from the load to the power source due to the body diode of the high-side E-mode transistor, which makes it unsuitable for synchronous rectifier applications.…”

“…To fulfill the transistor-matching issues, the characteristics of the D-mode MIS-HEMT GaN is studied, including the epitaxial structure and the field plate, in Section 2.1, to provide the designed information for circuit configuration. Section 2.2 reviews the previous labmade GaN HEMTs cascode topology from NCTU [16][17][18][19][20][21][22]. Due to this cascode topology, which did not perform well in synchronous rectifier applications for solving the switching frequency limited by the NMOS switch and the returning current flow from the load problems, a single gate controlled P-Cascode GaN HEMT module configuration is proposed in Section 2.3.…”